arm64: dts: marvell: fix typos in comment describing the NAND controller

Fix the same typo duplicated in both master and slave version of
armada-cp110-*.dtsi file: s/limiation/limitation/.

[gregory.clement@free-electrons.com: add the commit log]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
index 6206c1d..9361bac 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
@@ -320,7 +320,7 @@
 
                        cpm_nand: nand@720000 {
                                /*
-                                * Due to the limiation of the pin available
+                                * Due to the limitation of the pins available
                                 * this controller is only usable on the CPM
                                 * for A7K and on the CPS for A8K.
                                 */

diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
index e98f92c..bfe19a6 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
@@ -321,7 +321,7 @@
 
                        cps_nand: nand@720000 {
                                /*
-                                * Due to the limiation of the pin available
+                                * Due to the limitation of the pins available
                                 * this controller is only usable on the CPM
                                 * for A7K and on the CPS for A8K.
                                 */