clock_fast = false;
break;
}
- is_cyclesteal = ((config.dipswitch & FM7_DIPSW_CYCLESTEAL) != 0) ? true : false;
enter_display();
offset_point = 0;
offset_changed[i] = true;
tmp_offset_point[i].d = 0;
}
-
-#if defined(_FM77AV_VARIANTS)
- offset_77av = false;
- offset_point_bank1 = 0;
- offset_point_bak = 0;
- offset_point_bank1_bak = 0;
- display_page = 0;
- active_page = 0;
-
- subcpu_resetreq = false;
- subrom_bank_using = subrom_bank;
-
- nmi_enable = true;
- use_alu = false;
+
+#if defined(_FM77AV_VARIANTS) || defined(_FM77L4)
vram_wrote_shadow = false;
for(i = 0; i < 400; i++) vram_wrote_table[i] = true;
for(i = 0; i < 400; i++) vram_draw_table[i] = true;
register_event(this, EVENT_FM7SUB_VSTART, usec, false, &vstart_event_id); // NEXT CYCLE_
mainio->write_signal(SIG_DISPLAY_DISPLAY, 0x00, 0xff);
mainio->write_signal(SIG_DISPLAY_VSYNC, 0xff, 0xff);
+#endif
+#if defined(_FM77AV_VARIANTS)
+ offset_77av = false;
+ offset_point_bank1 = 0;
+ offset_point_bak = 0;
+ offset_point_bank1_bak = 0;
+ display_page = 0;
+ active_page = 0;
+ subcpu_resetreq = false;
+ subrom_bank_using = subrom_bank;
+
+ nmi_enable = true;
+ use_alu = false;
+
# if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX)
vram_bank = 0;
vram_display_block = 0;
mode400line = false;
#endif
emu->set_vm_screen_size(640, 200, SCREEN_WIDTH_ASPECT, SCREEN_HEIGHT_ASPECT, WINDOW_WIDTH_ASPECT, WINDOW_HEIGHT_ASPECT);
-
+ is_cyclesteal = ((config.dipswitch & FM7_DIPSW_CYCLESTEAL) != 0) ? true : false;
key_firq_req = false; //firq_mask = true;
firq_mask = false;
reset_cpuonly();
+
#if defined(_FM77AV_VARIANTS)
power_on_reset = false;
for(i = 0; i < 411; i++) vram_wrote_table[i] = false;
multimode_dispmask = 0x00;
# endif
#endif
+ //enter_display();
+
if(nmi_event_id >= 0) cancel_event(this, nmi_event_id);
register_event(this, EVENT_FM7SUB_DISPLAY_NMI, 20000.0, true, &nmi_event_id); // NEXT CYCLE_
subcpu->write_signal(SIG_CPU_BUSREQ, 0, 1);
subclock = SUBCLOCK_SLOW;
}
if(!is_cyclesteal && vram_accessflag) {
- if((config.dipswitch & FM7_DIPSW_CYCLESTEAL) == 0) subclock = subclock / 3;
+ subclock = subclock / 3;
}
if(prev_clock != subclock) p_vm->set_cpu_clock(subcpu, subclock);
prev_clock = subclock;
case EVENT_FM7SUB_DISPLAY_NMI_OFF: // per 20.00ms
do_nmi(false);
break;
-#if defined(_FM77AV_VARIANTS)
+#if defined(_FM77AV_VARIANTS) || defined(_FM77L4)
case EVENT_FM7SUB_HDISP:
hblank = false;
f = false;
mainio->write_signal(SIG_DISPLAY_DISPLAY, 0x02, 0xff);
+ //if(displine == 0) enter_display();
if(display_mode == DISPLAY_MODE_8_400L) {
usec = 30.0;
if(displine < 400) f = true;
register_event(this, EVENT_FM7SUB_HBLANK, usec, false, &hblank_event_id); // NEXT CYCLE_
vsync = false;
vblank = false;
+ enter_display();
}
f = false;
break;
vsync = false;
hblank = false;
displine = 0;
- //leave_display();
// Parameter from XM7/VM/display.c , thanks, Ryu.
mainio->write_signal(SIG_DISPLAY_DISPLAY, 0x00, 0xff);
mainio->write_signal(SIG_DISPLAY_VSYNC, 0x00, 0xff);
void DISPLAY::event_frame()
{
-#if !defined(_FM77AV_VARIANTS)
+#if !defined(_FM77AV_VARIANTS) && !defined(_FM77L4)
if(vram_wrote) screen_update_flag = true;
-#endif
enter_display();
+#endif
}
void DISPLAY::event_vline(int v, int clock)
}
break;
case SIG_DISPLAY_CLOCK:
- if(clock_fast != flag) {
- uint32 clk;
- if(flag) {
- clk = SUBCLOCK_NORMAL;
- } else {
- clk = SUBCLOCK_SLOW;
- }
- if((config.dipswitch & FM7_DIPSW_CYCLESTEAL) == 0) clk = clk / 3;
- if(clk != prev_clock) p_vm->set_cpu_clock(subcpu, clk);
- clock_fast = flag;
- prev_clock = clk;
- }
+ clock_fast = flag;
+ enter_display();
break;
#if defined(_FM77AV_VARIANTS)
case SIG_FM7_SUB_BANK: // Main: FD13
hdisp_event_id = -1;
vsync_event_id = -1;
vstart_event_id = -1;
+#endif
+#if defined(_FM8)
+ clock_fast = false;
+#else
+ clock_fast = true;
+#endif
+#if defined(_FM77_VARIANTS) || defined(_FM77AV_VARIANTS)
+ is_cyclesteal = true;
+#else
+ is_cyclesteal = false;
#endif
- switch(config.cpu_type){
- case 0:
- clock_fast = true;
- break;
- case 1:
- clock_fast = false;
- break;
- }
emu->set_vm_screen_size(640, 200, SCREEN_WIDTH_ASPECT, SCREEN_HEIGHT_ASPECT, WINDOW_WIDTH_ASPECT, WINDOW_HEIGHT_ASPECT);
- is_cyclesteal = ((config.dipswitch & FM7_DIPSW_CYCLESTEAL) != 0) ? true : false;
enter_display();
nmi_event_id = -1;
firq_mask = false;
#else
led_terminate = new DEVICE(this, emu);
#endif
- //maincpu = new MC6809(this, emu);
- //subcpu = new MC6809(this, emu);
-#ifdef WITH_Z80
- //z80cpu = new Z80(this, emu);
-#endif
// MEMORIES must set before initialize().
maincpu->set_context_mem(mainmem);
subcpu->set_context_mem(display);
event->set_context_sound(keyboard_beep);
# endif
#endif
+#if !defined(_FM77AV_VARIANTS) && !defined(_FM77L4)
event->register_frame_event(display);
- //event->register_vline_event(display);
- //event->register_vline_event(mainio);
-
+#endif
mainio->set_context_maincpu(maincpu);
mainio->set_context_subcpu(subcpu);
drec->set_context_ear(mainio, FM7_MAINIO_CMT_RECV, 0xffffffff);
//drec->set_context_remote(mainio, FM7_MAINIO_CMT_REMOTE, 0xffffffff);
mainio->set_context_datarec(drec);
+
mainmem->set_context_mainio(mainio);
mainmem->set_context_display(display);
mainmem->set_context_maincpu(maincpu);
display->set_context_mainio(mainio);
display->set_context_subcpu(subcpu);
display->set_context_keyboard(keyboard);
+
+ mainio->set_context_clock_status(mainmem, FM7_MAINIO_CLOCKMODE, 0xffffffff);
+ mainio->set_context_clock_status(display, SIG_DISPLAY_CLOCK, 0xffffffff);
+
subcpu->set_context_bus_halt(display, SIG_FM7_SUB_HALT, 0xffffffff);
subcpu->set_context_bus_halt(mainmem, SIG_FM7_SUB_HALT, 0xffffffff);
// Event handler
int nmi_event_id;
-#if defined(_FM77AV_VARIANTS)
- uint32 displine;
- int vblank_count;
- bool subcpu_resetreq;
- bool power_on_reset;
-
+#if defined(_FM77AV_VARIANTS) || defined(_FM77L4)
int hblank_event_id;
int hdisp_event_id;
int vsync_event_id;
int vstart_event_id;
+
+ uint32 displine;
+ int vblank_count;
+#endif
+#if defined(_FM77AV_VARIANTS)
+ bool subcpu_resetreq;
+ bool power_on_reset;
#endif
DEVICE *ins_led;
DEVICE *kana_led;
defined(_FM77AV20) || defined(_FM77AV20SX) || defined(_FM77AV20EX)
int vram_bank;
bool vram_page;
-
uint8 console_ram_bank;
-
uint8 vram_active_block;
uint8 vram_display_block;
#elif defined(_FM77_VARIANTS)
DEVICE *kanjiclass1;
#endif
-
-#if defined(_FM77AV_VARIANTS)
- bool use_alu;
- DEVICE *alu;
+
+#if defined(_FM77AV_VARIANTS) || defined(_FM77L4)
bool vram_wrote_shadow;
bool vram_wrote_table[411];
bool vram_draw_table[411];
#endif
+#if defined(_FM77AV_VARIANTS)
+ bool use_alu;
+ DEVICE *alu;
+#endif
DEVICE *mainio;
DEVICE *subcpu;
DEVICE *keyboard;
void write_vram_data8(uint32 addr, uint8 data);
void write_data8_main(uint32 addr, uint8 data);
-
void write_vram_l4_400l(uint32 addr, uint32 offset, uint32 data);
void write_mmio(uint32 addr, uint32 data);
event_beep_oneshot = -1;
event_timerirq = -1;
event_fdc_motor = -1;
+ init_output_signals(&clock_status);
#if defined(_FM77_VARIANTS) || defined(_FM77AV_VARIANTS)
boot_ram = false;
# if defined(_FM77_VARIANTS)
#endif
// Around boot rom
#if defined(_FM77_VARIANTS)
- boot_ram = (mainmem->read_signal(FM7_MAINIO_BOOTRAM_RW) == 0) ? false : true;
-#endif
-#if defined(_FM77AV_VARIANTS)
- //enable_initiator = true;
- //mainmem->write_signal(FM7_MAINIO_INITROM_ENABLED, (enable_initiator) ? 0xffffffff : 0 , 0xffffffff);
- boot_ram = (mainmem->read_signal(FM7_MAINIO_BOOTRAM_RW) == 0) ? false : true;
+ //boot_ram = (mainmem->read_signal(FM7_MAINIO_BOOTRAM_RW) == 0) ? false : true;
+ boot_ram = false;
+#elif defined(_FM77AV_VARIANTS)
+ //boot_ram = (mainmem->read_signal(FM7_MAINIO_BOOTRAM_RW) == 0) ? false : true;
+ boot_ram = true;
#endif
// FD05
extdet_neg = false;
//stat_romrammode = true;
// IF BASIC BOOT THEN ROM
// ELSE RAM
- mainmem->write_signal(FM7_MAINIO_PUSH_FD0F, ((config.boot_mode & 3) == 0) ? 0xffffffff : 0, 0xffffffff);
+ //mainmem->write_signal(FM7_MAINIO_PUSH_FD0F, ((config.boot_mode & 3) == 0) ? 0xffffffff : 0, 0xffffffff);
#if defined(_FM77AV_VARIANTS)
sub_monitor_type = 0x00;
#endif
// MMR
-#ifdef HAS_MMR
- mainmem->write_signal(FM7_MAINIO_WINDOW_ENABLED, 0, 0xffffffff);
- mainmem->write_data8(FM7_MAINIO_WINDOW_OFFSET, 0x00);
- mainmem->write_signal(FM7_MAINIO_FASTMMR_ENABLED, 0, 0xffffffff);
- mainmem->write_signal(FM7_MAINIO_MMR_ENABLED, 0, 0xffffffff);
- //mainmem->write_data8(FM7_MAINIO_MMR_SEGMENT, mmr_segment);
-#endif
+//#ifdef HAS_MMR
+ //mainmem->write_signal(FM7_MAINIO_WINDOW_ENABLED, 0, 0xffffffff);
+ //mainmem->write_data8(FM7_MAINIO_WINDOW_OFFSET, 0x00);
+ //mainmem->write_signal(FM7_MAINIO_FASTMMR_ENABLED, 0, 0xffffffff);
+ //mainmem->write_signal(FM7_MAINIO_MMR_ENABLED, 0, 0xffffffff);
+//mainmem->write_data8(FM7_MAINIO_MMR_SEGMENT, mmr_segment);
+//#endif
switch(config.cpu_type){
case 0:
clock_fast = true;
clock_fast = false;
break;
}
- this->write_signal(FM7_MAINIO_CLOCKMODE, clock_fast ? 1 : 0, 1);
- //mainmem->write_signal(FM7_MAINIO_CLOCKMODE, clock_fast ? 1 : 0, 1);
+ this->write_signals(&clock_status, clock_fast ? 0xffffffff : 0);
// FD03
irqmask_syndet = true;
stat_fdmode_2hd = false; // R/W : bit6, '0' = 2HD, '1' = 2DD. FM-77 Only.
stat_kanjirom = true; // R/W : bit5, '0' = sub, '1' = main. FM-77 Only.
#endif
- //display->write_signal(SIG_FM7_SUB_KEY_MASK, 1, 1);
- //display->write_signal(SIG_FM7_SUB_KEY_FIRQ, 0, 1);
maincpu->write_signal(SIG_CPU_FIRQ, 0, 1);
#if defined(HAS_DMA)
intstat_dma = false;
} else {
clock_fast = false;
}
- {
-#if 0
- uint32 clocks = 1794000;
-#if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
- if(mainmem->read_signal(FM7_MAINIO_MMR_ENABLED) != 0) {
- if(mainmem->read_signal(FM7_MAINIO_FASTMMR_ENABLED)) {
- if(clock_fast) {
- clocks = 2016000; // Hz
- } else {
- clocks = 1230502; // (2016 * 1095 / 1794)[KHz]
- }
- } else {
- if(clock_fast) {
- clocks = 1565000; // Hz
- } else {
- clocks = 955226; // (1565 * 1095 / 1794)[KHz]
- }
- }
- } else {
- if(clock_fast) {
- clocks = 1794000; // Hz
- } else {
- clocks = 1095000; // Hz
- }
- }
-#else // 7/8
- if(clock_fast) {
- clocks = 1794000; // Hz
- } else {
- clocks = 1095000; // Hz
- }
-#endif
- p_vm->set_cpu_clock(this->maincpu, clocks);
-#endif
- mainmem->write_signal(FM7_MAINIO_CLOCKMODE, clock_fast ? 1 : 0, 1);
- display->write_signal(SIG_DISPLAY_CLOCK, clock_fast ? 1 : 0, 1);
- }
+ this->write_signals(&clock_status, clock_fast ? 0xffffffff : 0);
break;
case FM7_MAINIO_CMT_RECV: // FD02
cmt_indat = val_b ^ cmt_invert;
break;
case 0x13:
sub_monitor_type = data & 0x07;
- display->write_signal(SIG_FM7_SUB_BANK, sub_monitor_type, 0x07);
+ display->write_signal(SIG_FM7_SUB_BANK, sub_monitor_type, 0x07);
break;
#endif
case 0x15: // OPN CMD
clock_fast = false;
break;
}
- this->write_signal(FM7_MAINIO_CLOCKMODE, clock_fast ? 1 : 0, 1);
+ this->write_signals(&clock_status, clock_fast ? 0xffffffff : 0);
#if defined(_FM8)
// BASIC
if(config.boot_mode == 0) {
int event_beep_oneshot;
int event_timerirq;
int event_fdc_motor;
+ outputs_t clock_status;
protected:
VM* p_vm;
EMU* p_emu;
void set_context_joystick(DEVICE *p){
joystick = p;
}
+ void set_context_clock_status(DEVICE *p, int id, uint32 mask) {
+ register_output_signal(&clock_status, p, id, mask);
+ }
void set_context_z80cpu(Z80 *p){
#ifdef WITH_Z80
z80 = p;
break;
case FM7_MAINIO_CLOCKMODE:
clockmode = flag;
+ setclock(clockmode ? 1 : 0);
break;
case FM7_MAINIO_BOOTMODE:
bootmode = data & 0x07;
void FM7_MAINMEM::update_config()
{
- setclock(config.cpu_type);
+ //setclock(config.cpu_type);
}
FM7_MAINMEM::FM7_MAINMEM(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
diag_load_bootrom_dos = false;
diag_load_bootrom_mmr = false;
-
#if defined(_FM77AV_VARIANTS)
dictrom_connected = false;
#endif