drm/i915/tgl: add initial Tiger Lake definitions

Tiger Lake is a Intel® Processor containing Intel® HD Graphics.

This is just an initial Tiger Lake definition. PCI IDs, generic support
and new features coming in following patches.

v2 (Lucas):
  - Remove modular FIA - feature will be re-introduced in future

Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190711173115.28296-3-lucas.demarchi@intel.com

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2fa1d35..e89a553 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2086,6 +2086,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define IS_CANNONLAKE(dev_priv)        IS_PLATFORM(dev_priv, INTEL_CANNONLAKE)
 #define IS_ICELAKE(dev_priv)   IS_PLATFORM(dev_priv, INTEL_ICELAKE)
 #define IS_ELKHARTLAKE(dev_priv)       IS_PLATFORM(dev_priv, INTEL_ELKHARTLAKE)
+#define IS_TIGERLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_TIGERLAKE)
 #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
                                    (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
 #define IS_BDW_ULT(dev_priv) \

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 94b588e..da92648 100644 (file)
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -765,6 +765,35 @@ static const struct intel_device_info intel_elkhartlake_info = {
        .ppgtt_size = 36,
 };
 
+#define GEN12_FEATURES \
+       GEN11_FEATURES, \
+       GEN(12), \
+       .pipe_offsets = { \
+               [TRANSCODER_A] = PIPE_A_OFFSET, \
+               [TRANSCODER_B] = PIPE_B_OFFSET, \
+               [TRANSCODER_C] = PIPE_C_OFFSET, \
+               [TRANSCODER_D] = PIPE_D_OFFSET, \
+               [TRANSCODER_DSI_0] = PIPE_DSI0_OFFSET, \
+               [TRANSCODER_DSI_1] = PIPE_DSI1_OFFSET, \
+       }, \
+       .trans_offsets = { \
+               [TRANSCODER_A] = TRANSCODER_A_OFFSET, \
+               [TRANSCODER_B] = TRANSCODER_B_OFFSET, \
+               [TRANSCODER_C] = TRANSCODER_C_OFFSET, \
+               [TRANSCODER_D] = TRANSCODER_D_OFFSET, \
+               [TRANSCODER_DSI_0] = TRANSCODER_DSI0_OFFSET, \
+               [TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \
+       }
+
+static const struct intel_device_info intel_tigerlake_12_info = {
+       GEN12_FEATURES,
+       PLATFORM(INTEL_TIGERLAKE),
+       .num_pipes = 4,
+       .require_force_probe = 1,
+       .engine_mask =
+               BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
+};
+
 #undef GEN
 #undef PLATFORM
 

diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index e64536e..e0d9a7a 100644 (file)
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -58,6 +58,7 @@ static const char * const platform_names[] = {
        PLATFORM_NAME(CANNONLAKE),
        PLATFORM_NAME(ICELAKE),
        PLATFORM_NAME(ELKHARTLAKE),
+       PLATFORM_NAME(TIGERLAKE),
 };
 #undef PLATFORM_NAME
 

diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index ddafc81..4685824 100644 (file)
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -78,6 +78,8 @@ enum intel_platform {
        /* gen11 */
        INTEL_ICELAKE,
        INTEL_ELKHARTLAKE,
+       /* gen12 */
+       INTEL_TIGERLAKE,
        INTEL_MAX_PLATFORMS
 };