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drm/amdgpu/vcn3.0: only SIENNA_CICHLID need specify instance for dec/enc
authorJames Zhu <James.Zhu@amd.com>
Thu, 13 Aug 2020 13:57:31 +0000 (09:57 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 14 Aug 2020 20:22:41 +0000 (16:22 -0400)
Only SIENNA_CICHLID(VCN3) has 2 unsymmetrical instances, there're less
codecs on instance 1, we use 0 for decode and 1 for encode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

index 63e5547..589d6cd 100644 (file)
@@ -198,7 +198,7 @@ static int vcn_v3_0_sw_init(void *handle)
                } else {
                        ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 8 * i;
                }
-               if (i != 0)
+               if (adev->asic_type == CHIP_SIENNA_CICHLID && i != 0)
                        ring->no_scheduler = true;
                sprintf(ring->name, "vcn_dec_%d", i);
                r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst[i].irq, 0,
@@ -222,7 +222,7 @@ static int vcn_v3_0_sw_init(void *handle)
                        } else {
                                ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 2 + j + 8 * i;
                        }
-                       if (i != 1)
+                       if (adev->asic_type == CHIP_SIENNA_CICHLID && i != 1)
                                ring->no_scheduler = true;
                        sprintf(ring->name, "vcn_enc_%d.%d", i, j);
                        r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst[i].irq, 0,