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dt-bindings: msm/mdp4: Create a separate binding doc for MDP4
authorArchit Taneja <architt@codeaurora.org>
Mon, 13 Jun 2016 14:07:37 +0000 (19:37 +0530)
committerRob Clark <robdclark@gmail.com>
Sat, 16 Jul 2016 14:09:03 +0000 (10:09 -0400)
MDP4 and MDP5 vary a bit in terms of device hierarchy and the properties
they require. Rename the binding doc to mdp4.txt and remove MDP5 specific
pieces. A separate document will be created for MDP5

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Documentation/devicetree/bindings/display/msm/mdp4.txt [moved from Documentation/devicetree/bindings/display/msm/mdp.txt with 75% similarity]

@@ -1,28 +1,25 @@
-Qualcomm adreno/snapdragon display controller
+Qualcomm adreno/snapdragon MDP4 display controller
+
+Description:
+
+This is the bindings documentation for the MDP4 display controller found in
+SoCs like MSM8960, APQ8064 and MSM8660.
 
 Required properties:
 - compatible:
   * "qcom,mdp4" - mdp4
-  * "qcom,mdp5" - mdp5
 - reg: Physical base address and length of the controller's registers.
 - interrupts: The interrupt signal from the display controller.
 - connectors: array of phandles for output device(s)
 - clocks: device clocks
   See ../clocks/clock-bindings.txt for details.
 - clock-names: the following clocks are required.
-  For MDP4:
-   * "core_clk"
-   * "iface_clk"
-   * "bus_clk"
-   * "lut_clk"
-   * "hdmi_clk"
-   * "tv_clk"
-  For MDP5:
-   * "bus_clk"
-   * "iface_clk"
-   * "core_clk"
-   * "lut_clk" (some MDP5 versions may not need this)
-   * "vsync_clk"
+  * "core_clk"
+  * "iface_clk"
+  * "bus_clk"
+  * "lut_clk"
+  * "hdmi_clk"
+  * "tv_clk"
 
 Optional properties:
 - gpus: phandle for gpu device