expand ISD::EXTLOAD

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30827 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 3f3b949..9c64445 100644 (file)
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -47,6 +47,8 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
   addRegisterClass(MVT::f32, ARM::FPRegsRegisterClass);
   addRegisterClass(MVT::f64, ARM::DFPRegsRegisterClass);
 
+  setLoadXAction(ISD::EXTLOAD, MVT::f32, Expand);
+
   setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);
 
   setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom);