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[X86] Resync Host.cpp with compiler-rt's cpu_model.c to enable 0x55 to be identified...
authorCraig Topper <craig.topper@intel.com>
Fri, 31 May 2019 19:18:07 +0000 (19:18 +0000)
committerCraig Topper <craig.topper@intel.com>
Fri, 31 May 2019 19:18:07 +0000 (19:18 +0000)
Some other formatting changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362256 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Support/Host.cpp

index 1aa2b82..221a0af 100644 (file)
@@ -661,10 +661,10 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
       break;
 
     // Skylake:
-    case 0x4e: // Skylake mobile
-    case 0x5e: // Skylake desktop
-    case 0x8e: // Kaby Lake mobile
-    case 0x9e: // Kaby Lake desktop
+    case 0x4e:              // Skylake mobile
+    case 0x5e:              // Skylake desktop
+    case 0x8e:              // Kaby Lake mobile
+    case 0x9e:              // Kaby Lake desktop
       *Type = X86::INTEL_COREI7; // "skylake"
       *Subtype = X86::INTEL_COREI7_SKYLAKE;
       break;
@@ -672,7 +672,10 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
     // Skylake Xeon:
     case 0x55:
       *Type = X86::INTEL_COREI7;
-      *Subtype = X86::INTEL_COREI7_SKYLAKE_AVX512; // "skylake-avx512"
+      if (Features2 & (1 << (X86::FEATURE_AVX512VNNI - 32)))
+        *Subtype = X86::INTEL_COREI7_CASCADELAKE; // "cascadelake"
+      else
+        *Subtype = X86::INTEL_COREI7_SKYLAKE_AVX512; // "skylake-avx512"
       break;
 
     // Cannonlake:
@@ -723,9 +726,11 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
     case 0x86:
       *Type = X86::INTEL_TREMONT;
       break;
+
     case 0x57:
       *Type = X86::INTEL_KNL; // knl
       break;
+
     case 0x85:
       *Type = X86::INTEL_KNM; // knm
       break;