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ARM: dts: imx6ull-dhcom: Add DHSOM based DRC02 board
authorChristoph Niedermaier <cniedermaier@dh-electronics.com>
Sun, 22 Jan 2023 16:20:13 +0000 (17:20 +0100)
committerShawn Guo <shawnguo@kernel.org>
Mon, 30 Jan 2023 01:57:12 +0000 (09:57 +0800)
Add DT for DH DRC02 unit, which is a universal controller device.
The system has two ethernet ports, two CANs, RS485 and RS232, USB,
capacitive buttons and an OLED display. For this board a DHCOM
i.MX6ULL SoM configuration without WiFi/BT is used. The interface
is used for the SD card instead.

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/imx6ull-dhcom-drc02.dts [new file with mode: 0644]

index e0395da..195477b 100644 (file)
@@ -741,6 +741,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
        imx6ull-colibri-wifi-eval-v3.dtb \
        imx6ull-colibri-wifi-iris.dtb \
        imx6ull-colibri-wifi-iris-v2.dtb \
+       imx6ull-dhcom-drc02.dtb \
        imx6ull-dhcom-pdk2.dtb \
        imx6ull-dhcom-picoitx.dtb \
        imx6ull-jozacp.dtb \
diff --git a/arch/arm/boot/dts/imx6ull-dhcom-drc02.dts b/arch/arm/boot/dts/imx6ull-dhcom-drc02.dts
new file mode 100644 (file)
index 0000000..b539975
--- /dev/null
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2023 DH electronics GmbH
+ *
+ * DHCOM iMX6ULL variant:
+ * DHCM-iMX6ULL-C080-R051-F0409-SPI-E2-CAN2-SD-RTC-ADC-I-01D2
+ * DHCOR PCB number: 578-200 or newer
+ * DHCOM PCB number: 579-200 or newer
+ * DRC02 PCB number: 568-100 or newer (2nd ethernet by SoM)
+ */
+/dts-v1/;
+
+#include "imx6ull-dhcom-som.dtsi"
+#include "imx6ull-dhcom-som-cfg-sdcard.dtsi"
+
+/ {
+       model = "DH electronics i.MX6ULL DHCOM on DRC02";
+       compatible = "dh,imx6ull-dhcom-drc02", "dh,imx6ull-dhcom-som",
+                    "dh,imx6ull-dhcor-som", "fsl,imx6ull";
+};
+
+/*
+ * The signals for CAN2 TX and RX are routed to the DHCOM UART1 RTS/CTS pins.
+ * Therefore the UART RTS/CTS must be output on other DHCOM pins, see uart1
+ * node below.
+ */
+&can2 {
+       status = "okay";
+};
+
+&gpio1 {
+       gpio-line-names =
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "DRC02-In2",
+               "", "", "", "",
+               "", "", "DHCOM-I", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "";
+};
+
+&gpio4 {
+       gpio-line-names =
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "DRC02-HW0", "DRC02-HW1", "DHCOM-M",
+               "DRC02-HW2", "DHCOM-U", "DHCOM-T", "DHCOM-S",
+               "DHCOM-R", "DHCOM-Q", "DHCOM-P", "DHCOM-O",
+               "DHCOM-N", "", "", "";
+       /*
+        * NOTE: On DRC02, the RS485_RX_En is controlled by a separate
+        * GPIO line, however the i.MX6ULL UART driver assumes RX happens
+        * during TX anyway and that it only controls drive enable DE
+        * line. Hence, the RX is always enabled here.
+        */
+       rs485-rx-en-hog {
+               gpio-hog;
+               gpios = <25 0>; /* GPIO Q */
+               line-name = "rs485-rx-en";
+               output-low;
+       };
+};
+
+&gpio5 {
+       gpio-line-names =
+               "DHCOM-A", "DHCOM-B", "DHCOM-C", "DRC02-Out2",
+               "DHCOM-E", "", "", "DRC02-Out1",
+               "DRC02-In1", "DHCOM-H", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "",
+               "", "", "", "";
+};
+
+/* DHCOM I2C2 */
+&i2c1 {
+       eeprom@56 {
+               compatible = "atmel,24c04";
+               reg = <0x56>;
+               pagesize = <16>;
+       };
+};
+
+&uart1 {
+       /delete-property/ uart-has-rtscts;
+       rts-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; /* GPIO I */
+       cts-gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>; /* GPIO M */
+};
+
+/* Use UART as RS485 */
+&uart2 {
+       /delete-property/ uart-has-rtscts;
+       linux,rs485-enabled-at-boot-time;
+       rts-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; /* GPIO P */
+};