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aspeed/smc: Calculate checksum on normal DMA
authorChristian Svensson <bluecmd@google.com>
Wed, 4 Sep 2019 07:05:04 +0000 (09:05 +0200)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 13 Sep 2019 15:05:01 +0000 (16:05 +0100)
This patch adds the missing checksum calculation on normal DMA transfer.
According to the datasheet this is how the SMC should behave.

Verified on AST1250 that the hardware matches the behaviour.

Signed-off-by: Christian Svensson <bluecmd@google.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20190904070506.1052-9-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/ssi/aspeed_smc.c

index 5c3436d..9ffc7e0 100644 (file)
@@ -989,6 +989,7 @@ static void aspeed_smc_dma_rw(AspeedSMCState *s)
         s->regs[R_DMA_FLASH_ADDR] += 4;
         s->regs[R_DMA_DRAM_ADDR] += 4;
         s->regs[R_DMA_LEN] -= 4;
+        s->regs[R_DMA_CHECKSUM] += data;
     }
 }