Add several testcases for new optimizations in the code generator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19244 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/X86/commute-two-addr.ll b/test/CodeGen/X86/commute-two-addr.ll
new file mode 100644 (file)
index 0000000..860c159
--- /dev/null
+++ b/test/CodeGen/X86/commute-two-addr.ll
@@ -0,0 +1,21 @@
+; The register allocator can commute two-address instructions to avoid
+; insertion of register-register copies.
+
+; Check that there are no register-register copies left.
+; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'mov %E.X, %E.X'
+
+%G = external global int
+
+declare void %ext(int)
+
+int %add_test(int %X, int %Y) {
+       %Z = add int %X, %Y      ;; Last use of Y, but not of X.
+       store int %Z, int* %G
+       ret int %X
+}
+
+int %xor_test(int %X, int %Y) {
+       %Z = xor int %X, %Y      ;; Last use of Y, but not of X.
+       store int %Z, int* %G
+       ret int %X
+}

diff --git a/test/CodeGen/X86/overlap-add.ll b/test/CodeGen/X86/overlap-add.ll
new file mode 100644 (file)
index 0000000..7fd99fe
--- /dev/null
+++ b/test/CodeGen/X86/overlap-add.ll
@@ -0,0 +1,24 @@
+;; X's live range extends beyond the shift, so the register allocator
+;; cannot coallesce it with Y.  Because of this, a copy needs to be
+;; emitted before the shift to save the register value before it is
+;; clobbered.  However, this copy is not needed if the register
+;; allocator turns the shift into an LEA.  This also occurs for ADD.
+
+; Check that the shift gets turned into an LEA.
+
+; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'mov %E.X, %E.X'
+
+%G = external global int
+
+int %test1(int %X, int %Y) {
+       %Z = add int %X, %Y
+       volatile store int %Y, int* %G
+       volatile store int %Z, int* %G
+       ret int %X
+}
+
+int %test2(int %X) {
+       %Z = add int %X, 1  ;; inc
+       volatile store int %Z, int* %G
+       ret int %X
+}

diff --git a/test/CodeGen/X86/overlap-shift.ll b/test/CodeGen/X86/overlap-shift.ll
new file mode 100644 (file)
index 0000000..cf5e897
--- /dev/null
+++ b/test/CodeGen/X86/overlap-shift.ll
@@ -0,0 +1,17 @@
+;; X's live range extends beyond the shift, so the register allocator
+;; cannot coallesce it with Y.  Because of this, a copy needs to be
+;; emitted before the shift to save the register value before it is
+;; clobbered.  However, this copy is not needed if the register
+;; allocator turns the shift into an LEA.  This also occurs for ADD.
+
+; Check that the shift gets turned into an LEA.
+
+; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | not grep 'mov %E.X, %E.X'
+
+%G = external global int
+
+int %test1(int %X) {
+       %Z = shl int %X, ubyte 2
+       volatile store int %Z, int* %G
+       ret int %X
+}