msm: mdss: hdmi: reset hdmi max supported TMDS clock

In current HDMI driver, SVDs and DTDs derived from EDID
of a DS HDMI sink are checked for supportness based
on previous connection's max TMDS clock.
Always reset the max TMDS clock supported by source
before reading EDID from DS HDMI device.

Change-Id: If5f58562f186634b1ed066fdebfc9fa6b55c6e8a
Signed-off-by: Narender Ankam <nankam@codeaurora.org>

diff --git a/drivers/video/fbdev/msm/mdss_hdmi_tx.c b/drivers/video/fbdev/msm/mdss_hdmi_tx.c
index 5eb17ab..5cb4362 100644 (file)
--- a/drivers/video/fbdev/msm/mdss_hdmi_tx.c
+++ b/drivers/video/fbdev/msm/mdss_hdmi_tx.c
@@ -2223,6 +2223,9 @@ static int hdmi_tx_read_sink_info(struct hdmi_tx_ctrl *hdmi_ctrl)
        DSS_REG_W_ND(io, HDMI_DDC_ARBITRATION,
                DSS_REG_R(io, HDMI_DDC_ARBITRATION) & ~(BIT(4)));
 
+       /* Set/Reset HDMI max TMDS clock supported by source */
+       hdmi_edid_set_max_pclk_rate(data, hdmi_ctrl->max_pclk_khz);
+
        if (!hdmi_ctrl->custom_edid && !hdmi_ctrl->sim_mode) {
                hdmi_ddc_config(&hdmi_ctrl->ddc_ctrl);