drm/amd/display: Add margin on DRR vblank start for subvp

[Description]
- Add margin for HUBP "jitter" for SubVp + DRR case
- Also do a min transition even if MPO is added on a
  non SubVP pipe (i.e. added on DRR pipe for SubVP + DRR)

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 1c3de3a..42840ce 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -3740,6 +3740,8 @@ static bool could_mpcc_tree_change_for_active_pipes(struct dc *dc,
 
        struct dc_stream_status *cur_stream_status = stream_get_status(dc->current_state, stream);
        bool force_minimal_pipe_splitting = false;
+       bool subvp_active = false;
+       uint32_t i;
 
        *is_plane_addition = false;
 
@@ -3771,11 +3773,25 @@ static bool could_mpcc_tree_change_for_active_pipes(struct dc *dc,
                }
        }
 
+       for (i = 0; i < dc->res_pool->pipe_count; i++) {
+               struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];
+
+               if (pipe->stream && pipe->stream->mall_stream_config.type != SUBVP_NONE) {
+                       subvp_active = true;
+                       break;
+               }
+       }
+
        /* For SubVP when adding or removing planes we need to add a minimal transition
         * (even when disabling all planes). Whenever disabling a phantom pipe, we
         * must use the minimal transition path to disable the pipe correctly.
+        *
+        * We want to use the minimal transition whenever subvp is active, not only if
+        * a plane is being added / removed from a subvp stream (MPO plane can be added
+        * to a DRR pipe of SubVP + DRR config, in which case we still want to run through
+        * a min transition to disable subvp.
         */
-       if (cur_stream_status && stream->mall_stream_config.type == SUBVP_MAIN) {
+       if (cur_stream_status && subvp_active) {
                /* determine if minimal transition is required due to SubVP*/
                if (cur_stream_status->plane_count > surface_count) {
                        force_minimal_pipe_splitting = true;

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 57fc919..578ee5e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -267,6 +267,7 @@ struct dc_caps {
        uint16_t subvp_pstate_allow_width_us;
        uint16_t subvp_vertical_int_margin_us;
        bool seamless_odm;
+       uint8_t subvp_drr_vblank_start_margin_us;
 };
 
 struct dc_bug_wa {

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index 097556f..6ccf477 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
@@ -493,6 +493,7 @@ static void populate_subvp_cmd_drr_info(struct dc *dc,
 
        pipe_data->pipe_config.vblank_data.drr_info.min_vtotal_supported = min_vtotal_supported;
        pipe_data->pipe_config.vblank_data.drr_info.max_vtotal_supported = max_vtotal_supported;
+       pipe_data->pipe_config.vblank_data.drr_info.drr_vblank_start_margin = dc->caps.subvp_drr_vblank_start_margin_us;
 }
 
 /**

diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h
index f4dfd3a..e0cee96 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_stream.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h
@@ -144,7 +144,7 @@ struct test_pattern {
        unsigned int cust_pattern_size;
 };
 
-#define SUBVP_DRR_MARGIN_US 500 // 500us for DRR margin (SubVP + DRR)
+#define SUBVP_DRR_MARGIN_US 600 // 600us for DRR margin (SubVP + DRR)
 
 enum mall_stream_type {
        SUBVP_NONE, // subvp not in use

diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
index cdeff6d..0c13fe0 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
@@ -2124,6 +2124,7 @@ static bool dcn32_resource_construct(
        dc->caps.subvp_swath_height_margin_lines = 16;
        dc->caps.subvp_pstate_allow_width_us = 20;
        dc->caps.subvp_vertical_int_margin_us = 30;
+       dc->caps.subvp_drr_vblank_start_margin_us = 100; // 100us margin
 
        dc->caps.max_slave_planes = 2;
        dc->caps.max_slave_yuv_planes = 2;

diff --git a/drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c b/drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c
index 6c79a47..d17d0f2 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c
@@ -1711,6 +1711,7 @@ static bool dcn321_resource_construct(
        dc->caps.subvp_swath_height_margin_lines = 16;
        dc->caps.subvp_pstate_allow_width_us = 20;
        dc->caps.subvp_vertical_int_margin_us = 30;
+       dc->caps.subvp_drr_vblank_start_margin_us = 100; // 100us margin
        dc->caps.max_slave_planes = 1;
        dc->caps.max_slave_yuv_planes = 1;
        dc->caps.max_slave_rgb_planes = 1;

diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index 795d881..33907fe 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -1029,13 +1029,14 @@ struct dmub_cmd_fw_assisted_mclk_switch_pipe_data_v2 {
                        uint16_t vtotal;
                        uint16_t htotal;
                        uint8_t vblank_pipe_index;
-                       uint8_t padding[2];
+                       uint8_t padding[1];
                        struct {
                                uint8_t drr_in_use;
                                uint8_t drr_window_size_ms;     // Indicates largest VMIN/VMAX adjustment per frame
                                uint16_t min_vtotal_supported;  // Min VTOTAL that supports switching in VBLANK
                                uint16_t max_vtotal_supported;  // Max VTOTAL that can support SubVP static scheduling
                                uint8_t use_ramping;            // Use ramping or not
+                               uint8_t drr_vblank_start_margin;
                        } drr_info;                             // DRR considered as part of SubVP + VBLANK case
                } vblank_data;
        } pipe_config;