phy: amlogic: phy-meson-gxl-usb2: rename some of the U2P_R2 registers

The U2P_R2 register provides "test mode" functionality for bits 17:0.
These are only used during SoC development and should be left untouched
on production SoC versions.
Rename these register definitions to indicate that these are for "test
mode" only.

While here, also merge the definitions for U2P_R2_DATA_IN_MASK and
U2P_R2_DATA_IN_EN_MASK (bits 0:7) because Amlogic's internal
documentation suggests that these bits belong together. The old
definition was not taken from the documentation but rather from a struct
definition in the Amlogic GPL kernel sources.

No functional changes.

Suggested-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

diff --git a/drivers/phy/amlogic/phy-meson-gxl-usb2.c b/drivers/phy/amlogic/phy-meson-gxl-usb2.c
index f062fc7..9f9b541 100644 (file)
--- a/drivers/phy/amlogic/phy-meson-gxl-usb2.c
+++ b/drivers/phy/amlogic/phy-meson-gxl-usb2.c
@@ -71,12 +71,11 @@
 
 /* bits [31:14] are read-only */
 #define U2P_R2                                                 0x8
-       #define U2P_R2_DATA_IN_MASK                             GENMASK(3, 0)
-       #define U2P_R2_DATA_IN_EN_MASK                          GENMASK(7, 4)
-       #define U2P_R2_ADDR_MASK                                GENMASK(11, 8)
-       #define U2P_R2_DATA_OUT_SEL                             BIT(12)
-       #define U2P_R2_CLK                                      BIT(13)
-       #define U2P_R2_DATA_OUT_MASK                            GENMASK(17, 14)
+       #define U2P_R2_TESTDATA_IN_MASK                         GENMASK(7, 0)
+       #define U2P_R2_TESTADDR_MASK                            GENMASK(11, 8)
+       #define U2P_R2_TESTDATA_OUT_SEL                         BIT(12)
+       #define U2P_R2_TESTCLK                                  BIT(13)
+       #define U2P_R2_TESTDATA_OUT_MASK                        GENMASK(17, 14)
        #define U2P_R2_ACA_PIN_RANGE_C                          BIT(18)
        #define U2P_R2_ACA_PIN_RANGE_B                          BIT(19)
        #define U2P_R2_ACA_PIN_RANGE_A                          BIT(20)