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clk: rockchip: fix parent of hclk_vcodec on rk3036
author
Heiko Stuebner
<heiko@sntech.de>
Wed, 27 Jan 2016 20:38:37 +0000
(21:38 +0100)
committer
Heiko Stuebner
<heiko@sntech.de>
Thu, 4 Feb 2016 12:53:15 +0000
(13:53 +0100)
hclk_vcodec is a child of aclk_vcodec with the fixed factor clock
hclk_vcodec_pre in between and not a child of hclk_disp_pre.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-rk3036.c
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diff --git
a/drivers/clk/rockchip/clk-rk3036.c
b/drivers/clk/rockchip/clk-rk3036.c
index
9c317a3
..
38139dc
100644
(file)
--- a/
drivers/clk/rockchip/clk-rk3036.c
+++ b/
drivers/clk/rockchip/clk-rk3036.c
@@
-380,7
+380,7
@@
static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = {
GATE(HCLK_LCDC, "hclk_lcdc", "hclk_disp_pre", 0, RK2928_CLKGATE_CON(9), 5, GFLAGS),
/* hclk_video gates */
- GATE(HCLK_VCODEC, "hclk_vcodec", "hclk_
disp
_pre", 0, RK2928_CLKGATE_CON(3), 12, GFLAGS),
+ GATE(HCLK_VCODEC, "hclk_vcodec", "hclk_
vcodec
_pre", 0, RK2928_CLKGATE_CON(3), 12, GFLAGS),
/* xin24m gates */
GATE(SCLK_PVTM_CORE, "sclk_pvtm_core", "xin24m", 0, RK2928_CLKGATE_CON(10), 0, GFLAGS),