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riscv: dts: starfive: Add mmc nodes on VisionFive 2 board
authorWilliam Qiu <william.qiu@starfivetech.com>
Wed, 9 Aug 2023 01:39:17 +0000 (09:39 +0800)
committerConor Dooley <conor.dooley@microchip.com>
Wed, 9 Aug 2023 18:40:49 +0000 (19:40 +0100)
Add the mmc nodes for the StarFive JH7110 SoC.
Set mmc0 node to emmc and set mmc1 node to sd.

Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
arch/riscv/boot/dts/starfive/jh7110.dtsi

index d67e26b..d79f944 100644 (file)
@@ -17,6 +17,8 @@
                i2c2 = &i2c2;
                i2c5 = &i2c5;
                i2c6 = &i2c6;
+               mmc0 = &mmc0;
+               mmc1 = &mmc1;
                serial0 = &uart0;
        };
 
        status = "okay";
 };
 
+&mmc0 {
+       max-frequency = <100000000>;
+       bus-width = <8>;
+       cap-mmc-highspeed;
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
+       non-removable;
+       cap-mmc-hw-reset;
+       post-power-on-delay-ms = <200>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc0_pins>;
+       vmmc-supply = <&vcc_3v3>;
+       vqmmc-supply = <&emmc_vdd>;
+       status = "okay";
+};
+
+&mmc1 {
+       max-frequency = <100000000>;
+       bus-width = <4>;
+       no-sdio;
+       no-mmc;
+       broken-cd;
+       cap-sd-highspeed;
+       post-power-on-delay-ms = <200>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc1_pins>;
+       status = "okay";
+};
+
 &qspi {
        #address-cells = <1>;
        #size-cells = <0>;
                };
        };
 
+       mmc0_pins: mmc0-0 {
+                rst-pins {
+                       pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
+                                             GPOEN_ENABLE,
+                                             GPI_NONE)>;
+                       bias-pull-up;
+                       drive-strength = <12>;
+                       input-disable;
+                       input-schmitt-disable;
+                       slew-rate = <0>;
+               };
+
+               mmc-pins {
+                       pinmux = <PINMUX(64, 0)>,
+                                <PINMUX(65, 0)>,
+                                <PINMUX(66, 0)>,
+                                <PINMUX(67, 0)>,
+                                <PINMUX(68, 0)>,
+                                <PINMUX(69, 0)>,
+                                <PINMUX(70, 0)>,
+                                <PINMUX(71, 0)>,
+                                <PINMUX(72, 0)>,
+                                <PINMUX(73, 0)>;
+                       bias-pull-up;
+                       drive-strength = <12>;
+                       input-enable;
+               };
+       };
+
+       mmc1_pins: mmc1-0 {
+               clk-pins {
+                       pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK,
+                                             GPOEN_ENABLE,
+                                             GPI_NONE)>;
+                       bias-pull-up;
+                       drive-strength = <12>;
+                       input-disable;
+                       input-schmitt-disable;
+                       slew-rate = <0>;
+               };
+
+               mmc-pins {
+                       pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD,
+                                            GPOEN_SYS_SDIO1_CMD,
+                                            GPI_SYS_SDIO1_CMD)>,
+                                <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0,
+                                             GPOEN_SYS_SDIO1_DATA0,
+                                             GPI_SYS_SDIO1_DATA0)>,
+                                <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1,
+                                             GPOEN_SYS_SDIO1_DATA1,
+                                             GPI_SYS_SDIO1_DATA1)>,
+                                <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2,
+                                            GPOEN_SYS_SDIO1_DATA2,
+                                            GPI_SYS_SDIO1_DATA2)>,
+                                <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3,
+                                            GPOEN_SYS_SDIO1_DATA3,
+                                            GPI_SYS_SDIO1_DATA3)>;
+                       bias-pull-up;
+                       drive-strength = <12>;
+                       input-enable;
+                       input-schmitt-enable;
+                       slew-rate = <0>;
+               };
+       };
+
        spi0_pins: spi0-0 {
                mosi-pins {
                        pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
index a608433..18d4b60 100644 (file)
                                 <&syscrg JH7110_SYSRST_WDT_CORE>;
                };
 
+               mmc0: mmc@16010000 {
+                       compatible = "starfive,jh7110-mmc";
+                       reg = <0x0 0x16010000 0x0 0x10000>;
+                       clocks = <&syscrg JH7110_SYSCLK_SDIO0_AHB>,
+                                <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
+                       clock-names = "biu","ciu";
+                       resets = <&syscrg JH7110_SYSRST_SDIO0_AHB>;
+                       reset-names = "reset";
+                       interrupts = <74>;
+                       fifo-depth = <32>;
+                       fifo-watermark-aligned;
+                       data-addr = <0>;
+                       starfive,sysreg = <&sys_syscon 0x14 0x1a 0x7c000000>;
+                       status = "disabled";
+               };
+
+               mmc1: mmc@16020000 {
+                       compatible = "starfive,jh7110-mmc";
+                       reg = <0x0 0x16020000 0x0 0x10000>;
+                       clocks = <&syscrg JH7110_SYSCLK_SDIO1_AHB>,
+                                <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
+                       clock-names = "biu","ciu";
+                       resets = <&syscrg JH7110_SYSRST_SDIO1_AHB>;
+                       reset-names = "reset";
+                       interrupts = <75>;
+                       fifo-depth = <32>;
+                       fifo-watermark-aligned;
+                       data-addr = <0>;
+                       starfive,sysreg = <&sys_syscon 0x9c 0x1 0x3e>;
+                       status = "disabled";
+               };
+
                gmac0: ethernet@16030000 {
                        compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
                        reg = <0x0 0x16030000 0x0 0x10000>;