PR18929:

According to ARM assembler language hash symbol is optional before immediates.
For example, see here for more details:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0473j/dom1359731154529.html

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205157 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index e672fdd..e933ec1 100644 (file)
--- a/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -1481,12 +1481,14 @@ AArch64AsmParser::ParseRelocPrefix(AArch64MCExpr::VariantKind &RefKind) {
 AArch64AsmParser::OperandMatchResultTy
 AArch64AsmParser::ParseImmWithLSLOperand(
                                SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
-  // FIXME?: I want to live in a world where immediates must start with
-  // #. Please don't dash my hopes (well, do if you have a good reason).
-  if (Parser.getTok().isNot(AsmToken::Hash)) return MatchOperand_NoMatch;
 
   SMLoc S = Parser.getTok().getLoc();
-  Parser.Lex(); // Eat '#'
+
+  if (Parser.getTok().is(AsmToken::Hash))
+    Parser.Lex(); // Eat '#'
+  else if (Parser.getTok().isNot(AsmToken::Integer))
+    // Operand should start from # or should be integer, emit error otherwise.
+    return MatchOperand_NoMatch;
 
   const MCExpr *Imm;
   if (ParseImmediate(Imm) != MatchOperand_Success)
@@ -1585,12 +1587,13 @@ AArch64AsmParser::OperandMatchResultTy
 AArch64AsmParser::ParseFPImmOperand(
                                SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
 
-  // FIXME?: I want to live in a world where immediates must start with
-  // #. Please don't dash my hopes (well, do if you have a good reason).
-  if (Parser.getTok().isNot(AsmToken::Hash)) return MatchOperand_NoMatch;
-
   SMLoc S = Parser.getTok().getLoc();
-  Parser.Lex(); // Eat '#'
+
+  bool Hash = false;
+  if (Parser.getTok().is(AsmToken::Hash)) {
+    Parser.Lex(); // Eat '#'
+    Hash = true;
+  }
 
   bool Negative = false;
   if (Parser.getTok().is(AsmToken::Minus)) {
@@ -1601,6 +1604,8 @@ AArch64AsmParser::ParseFPImmOperand(
   }
 
   if (Parser.getTok().isNot(AsmToken::Real)) {
+    if (!Hash)
+      return MatchOperand_NoMatch;
     Error(S, "Expected floating-point immediate");
     return MatchOperand_ParseFail;
   }
@@ -1619,15 +1624,14 @@ AArch64AsmParser::ParseFPImmOperand(
 AArch64AsmParser::OperandMatchResultTy
 AArch64AsmParser::ParseFPImm0AndImm0Operand(
                                SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
-  // FIXME?: I want to live in a world where immediates must start with
-  // #. Please don't dash my hopes (well, do if you have a good reason).
-
-  //This function is only used in floating compare with zero instructions to get
-  //those instructions accept both #0.0 and #0.
-  if (Parser.getTok().isNot(AsmToken::Hash)) return MatchOperand_NoMatch;
 
   SMLoc S = Parser.getTok().getLoc();
-  Parser.Lex(); // Eat '#'
+
+  bool Hash = false;
+  if (Parser.getTok().is(AsmToken::Hash)) {
+    Parser.Lex(); // Eat '#'
+    Hash = true;
+  }
 
   APFloat RealVal(0.0);
   if (Parser.getTok().is(AsmToken::Real)) {
@@ -1643,6 +1647,8 @@ AArch64AsmParser::ParseFPImm0AndImm0Operand(
     }
   }
   else {
+    if (!Hash)
+      return MatchOperand_NoMatch;
     Error(S, "only #0.0 is acceptable as immediate");
     return MatchOperand_ParseFail;
   }

diff --git a/test/MC/AArch64/optional-hash.s b/test/MC/AArch64/optional-hash.s
new file mode 100644 (file)
index 0000000..54b6fb3
--- /dev/null
+++ b/test/MC/AArch64/optional-hash.s
@@ -0,0 +1,17 @@
+// PR18929
+// RUN: llvm-mc < %s -triple=aarch64-linux-gnueabi -mattr=+fp-armv8,+neon -filetype=obj -o - \
+// RUN: | llvm-objdump --disassemble -arch=aarch64 -mattr=+fp-armv8,+neon - | FileCheck %s
+
+    .text
+// CHECK: cmp w0, #123
+    cmp w0, 123
+// CHECK: fmov s0, #1.06250000
+    fmov s0, 1.0625
+// CHECK: fcmp s0, #0.0
+    fcmp s0, 0.0
+// CHECK: cmgt v0.8b, v15.8b, #0
+    cmgt v0.8b, v15.8b, 0
+// CHECK: fcmeq v0.2s, v31.2s, #0.0
+    fcmeq v0.2s, v31.2s, 0.0
+l1:
+l2: