return dev;
}
-static void riscv_virt_board_init(MachineState *machine)
+static void virt_machine_init(MachineState *machine)
{
const struct MemmapEntry *memmap = virt_memmap;
RISCVVirtState *s = RISCV_VIRT_MACHINE(machine);
g_free(plic_hart_config);
}
-static void riscv_virt_machine_instance_init(Object *obj)
+static void virt_machine_instance_init(Object *obj)
{
}
-static void riscv_virt_machine_class_init(ObjectClass *oc, void *data)
+static void virt_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
mc->desc = "RISC-V VirtIO board";
- mc->init = riscv_virt_board_init;
+ mc->init = virt_machine_init;
mc->max_cpus = 8;
mc->default_cpu_type = VIRT_CPU;
mc->pci_allow_0_address = true;
}
-static const TypeInfo riscv_virt_machine_typeinfo = {
+static const TypeInfo virt_machine_typeinfo = {
.name = MACHINE_TYPE_NAME("virt"),
.parent = TYPE_MACHINE,
- .class_init = riscv_virt_machine_class_init,
- .instance_init = riscv_virt_machine_instance_init,
+ .class_init = virt_machine_class_init,
+ .instance_init = virt_machine_instance_init,
.instance_size = sizeof(RISCVVirtState),
};
-static void riscv_virt_machine_init_register_types(void)
+static void virt_machine_init_register_types(void)
{
- type_register_static(&riscv_virt_machine_typeinfo);
+ type_register_static(&virt_machine_typeinfo);
}
-type_init(riscv_virt_machine_init_register_types)
+type_init(virt_machine_init_register_types)