Rename the existing tBX/tBXr9 instructions to tBX_CALL/tBXr9_CALL to better

reflect their actual meaning and match the ARM instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132039 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp
index 02263ee..dc6cdae 100644 (file)
--- a/lib/Target/ARM/ARMAsmPrinter.cpp
+++ b/lib/Target/ARM/ARMAsmPrinter.cpp
@@ -1875,7 +1875,7 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
   case ARM::TAILJMPr:
   case ARM::tTAILJMPr: {
     unsigned newOpc = (Opc == ARM::TAILJMPr || Opc == ARM::TAILJMPrND)
-      ? ARM::BX : ARM::tBX;
+      ? ARM::BX : ARM::tBX_CALL;
     MCInst TmpInst;
     TmpInst.setOpcode(newOpc);
     TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));

diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td
index 07b46d9..e715ac2 100644 (file)
--- a/lib/Target/ARM/ARMInstrThumb.td
+++ b/lib/Target/ARM/ARMInstrThumb.td
@@ -466,7 +466,7 @@ let isCall = 1,
   // ARMv4T
   // FIXME: Should be a pseudo.
   let isCodeGenOnly = 1 in
-  def tBX : TIx2<{?,?,?,?,?}, {?,?}, ?,
+  def tBX_CALL : TIx2<{?,?,?,?,?}, {?,?}, ?,
                   (outs), (ins tGPR:$func, variable_ops), IIC_Br,
                   "mov\tlr, pc\n\tbx\t$func",
                   [(ARMcall_nolink tGPR:$func)]>,
@@ -521,7 +521,7 @@ let isCall = 1,
   // ARMv4T
   let isCodeGenOnly = 1 in
   // FIXME: Should be a pseudo.
-  def tBXr9 : TIx2<{?,?,?,?,?}, {?,?}, ?,
+  def tBXr9_CALL : TIx2<{?,?,?,?,?}, {?,?}, ?,
                    (outs), (ins tGPR:$func, variable_ops), IIC_Br,
                    "mov\tlr, pc\n\tbx\t$func",
                    [(ARMcall_nolink tGPR:$func)]>,