[POWERPC] Reworked interrupt numbers for OpenPIC based Freescale chips

Make the interrupt numbers match the OpenPIC spec intead of the
Freescale docs which distinguish between internal and external interrupts.

Now we can use the interrupt number directly to find the register offset
associated with it.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 78828b2..364a969 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -52,7 +52,7 @@
                        compatible = "fsl,8540-memory-controller";
                        reg = <2000 1000>;
                        interrupt-parent = <&mpic>;
-                       interrupts = <2 2>;
+                       interrupts = <12 2>;
                };
 
                l2-cache-controller@20000 {
@@ -61,14 +61,14 @@
                        cache-line-size = <20>; // 32 bytes
                        cache-size = <40000>;   // L2, 256K
                        interrupt-parent = <&mpic>;
-                       interrupts = <0 2>;
+                       interrupts = <10 2>;
                };
 
                i2c@3000 {
                        device_type = "i2c";
                        compatible = "fsl-i2c";
                        reg = <3000 100>;
-                       interrupts = <1b 2>;
+                       interrupts = <2b 2>;
                        interrupt-parent = <&mpic>;
                        dfsrr;
                };
@@ -81,19 +81,19 @@
                        reg = <24520 20>;
                        phy0: ethernet-phy@0 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <35 1>;
+                               interrupts = <5 1>;
                                reg = <0>;
                                device_type = "ethernet-phy";
                        };
                        phy1: ethernet-phy@1 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <35 1>;
+                               interrupts = <5 1>;
                                reg = <1>;
                                device_type = "ethernet-phy";
                        };
                        phy3: ethernet-phy@3 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <37 1>;
+                               interrupts = <7 1>;
                                reg = <3>;
                                device_type = "ethernet-phy";
                        };
@@ -113,7 +113,7 @@
                         */
                        address = [ 00 00 00 00 00 00 ];
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <d 2 e 2 12 2>;
+                       interrupts = <1d 2 1e 2 22 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy0>;
                };
@@ -132,7 +132,7 @@
                         */
                        address = [ 00 00 00 00 00 00 ];
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <13 2 14 2 18 2>;
+                       interrupts = <23 2 24 2 28 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy1>;
                };
@@ -151,7 +151,7 @@
                         */
                        address = [ 00 00 00 00 00 00 ];
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <19 2>;
+                       interrupts = <29 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy3>;
                };
@@ -161,7 +161,7 @@
                        compatible = "ns16550";
                        reg = <4500 100>;       // reg base, size
                        clock-frequency = <0>;  // should we fill in in uboot?
-                       interrupts = <1a 2>;
+                       interrupts = <2a 2>;
                        interrupt-parent = <&mpic>;
                };
 
@@ -170,7 +170,7 @@
                        compatible = "ns16550";
                        reg = <4600 100>;       // reg base, size
                        clock-frequency = <0>;  // should we fill in in uboot?
-                       interrupts = <1a 2>;
+                       interrupts = <2a 2>;
                        interrupt-parent = <&mpic>;
                };
                pci@8000 {
@@ -178,78 +178,78 @@
                        interrupt-map = <
 
                                /* IDSEL 0x02 */
-                               1000 0 0 1 &mpic 31 1
-                               1000 0 0 2 &mpic 32 1
-                               1000 0 0 3 &mpic 33 1
-                               1000 0 0 4 &mpic 34 1
+                               1000 0 0 1 &mpic 1 1
+                               1000 0 0 2 &mpic 2 1
+                               1000 0 0 3 &mpic 3 1
+                               1000 0 0 4 &mpic 4 1
 
                                /* IDSEL 0x03 */
-                               1800 0 0 1 &mpic 34 1
-                               1800 0 0 2 &mpic 31 1
-                               1800 0 0 3 &mpic 32 1
-                               1800 0 0 4 &mpic 33 1
+                               1800 0 0 1 &mpic 4 1
+                               1800 0 0 2 &mpic 1 1
+                               1800 0 0 3 &mpic 2 1
+                               1800 0 0 4 &mpic 3 1
 
                                /* IDSEL 0x04 */
-                               2000 0 0 1 &mpic 33 1
-                               2000 0 0 2 &mpic 34 1
-                               2000 0 0 3 &mpic 31 1
-                               2000 0 0 4 &mpic 32 1
+                               2000 0 0 1 &mpic 3 1
+                               2000 0 0 2 &mpic 4 1
+                               2000 0 0 3 &mpic 1 1
+                               2000 0 0 4 &mpic 2 1
 
                                /* IDSEL 0x05 */
-                               2800 0 0 1 &mpic 32 1
-                               2800 0 0 2 &mpic 33 1
-                               2800 0 0 3 &mpic 34 1
-                               2800 0 0 4 &mpic 31 1
+                               2800 0 0 1 &mpic 2 1
+                               2800 0 0 2 &mpic 3 1
+                               2800 0 0 3 &mpic 4 1
+                               2800 0 0 4 &mpic 1 1
 
                                /* IDSEL 0x0c */
-                               6000 0 0 1 &mpic 31 1
-                               6000 0 0 2 &mpic 32 1
-                               6000 0 0 3 &mpic 33 1
-                               6000 0 0 4 &mpic 34 1
+                               6000 0 0 1 &mpic 1 1
+                               6000 0 0 2 &mpic 2 1
+                               6000 0 0 3 &mpic 3 1
+                               6000 0 0 4 &mpic 4 1
 
                                /* IDSEL 0x0d */
-                               6800 0 0 1 &mpic 34 1
-                               6800 0 0 2 &mpic 31 1
-                               6800 0 0 3 &mpic 32 1
-                               6800 0 0 4 &mpic 33 1
+                               6800 0 0 1 &mpic 4 1
+                               6800 0 0 2 &mpic 1 1
+                               6800 0 0 3 &mpic 2 1
+                               6800 0 0 4 &mpic 3 1
 
                                /* IDSEL 0x0e */
-                               7000 0 0 1 &mpic 33 1
-                               7000 0 0 2 &mpic 34 1
-                               7000 0 0 3 &mpic 31 1
-                               7000 0 0 4 &mpic 32 1
+                               7000 0 0 1 &mpic 3 1
+                               7000 0 0 2 &mpic 4 1
+                               7000 0 0 3 &mpic 1 1
+                               7000 0 0 4 &mpic 2 1
 
                                /* IDSEL 0x0f */
-                               7800 0 0 1 &mpic 32 1
-                               7800 0 0 2 &mpic 33 1
-                               7800 0 0 3 &mpic 34 1
-                               7800 0 0 4 &mpic 31 1
+                               7800 0 0 1 &mpic 2 1
+                               7800 0 0 2 &mpic 3 1
+                               7800 0 0 3 &mpic 4 1
+                               7800 0 0 4 &mpic 1 1
 
                                /* IDSEL 0x12 */
-                               9000 0 0 1 &mpic 31 1
-                               9000 0 0 2 &mpic 32 1
-                               9000 0 0 3 &mpic 33 1
-                               9000 0 0 4 &mpic 34 1
+                               9000 0 0 1 &mpic 1 1
+                               9000 0 0 2 &mpic 2 1
+                               9000 0 0 3 &mpic 3 1
+                               9000 0 0 4 &mpic 4 1
 
                                /* IDSEL 0x13 */
-                               9800 0 0 1 &mpic 34 1
-                               9800 0 0 2 &mpic 31 1
-                               9800 0 0 3 &mpic 32 1
-                               9800 0 0 4 &mpic 33 1
+                               9800 0 0 1 &mpic 4 1
+                               9800 0 0 2 &mpic 1 1
+                               9800 0 0 3 &mpic 2 1
+                               9800 0 0 4 &mpic 3 1
 
                                /* IDSEL 0x14 */
-                               a000 0 0 1 &mpic 33 1
-                               a000 0 0 2 &mpic 34 1
-                               a000 0 0 3 &mpic 31 1
-                               a000 0 0 4 &mpic 32 1
+                               a000 0 0 1 &mpic 3 1
+                               a000 0 0 2 &mpic 4 1
+                               a000 0 0 3 &mpic 1 1
+                               a000 0 0 4 &mpic 2 1
 
                                /* IDSEL 0x15 */
-                               a800 0 0 1 &mpic 32 1
-                               a800 0 0 2 &mpic 33 1
-                               a800 0 0 3 &mpic 34 1
-                               a800 0 0 4 &mpic 31 1>;
+                               a800 0 0 1 &mpic 2 1
+                               a800 0 0 2 &mpic 3 1
+                               a800 0 0 3 &mpic 4 1
+                               a800 0 0 4 &mpic 1 1>;
                        interrupt-parent = <&mpic>;
-                       interrupts = <08 2>;
+                       interrupts = <18 2>;
                        bus-range = <0 0>;
                        ranges = <02000000 0 80000000 80000000 0 20000000
                                  01000000 0 00000000 e2000000 0 00100000>;

diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 2a0afbc..c35f169 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -52,7 +52,7 @@
                        compatible = "fsl,8541-memory-controller";
                        reg = <2000 1000>;
                        interrupt-parent = <&mpic>;
-                       interrupts = <2 2>;
+                       interrupts = <12 2>;
                };
 
                l2-cache-controller@20000 {
@@ -61,14 +61,14 @@
                        cache-line-size = <20>; // 32 bytes
                        cache-size = <40000>;   // L2, 256K
                        interrupt-parent = <&mpic>;
-                       interrupts = <0 2>;
+                       interrupts = <10 2>;
                };
 
                i2c@3000 {
                        device_type = "i2c";
                        compatible = "fsl-i2c";
                        reg = <3000 100>;
-                       interrupts = <1b 2>;
+                       interrupts = <2b 2>;
                        interrupt-parent = <&mpic>;
                        dfsrr;
                };
@@ -81,13 +81,13 @@
                        reg = <24520 20>;
                        phy0: ethernet-phy@0 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <35 0>;
+                               interrupts = <5 0>;
                                reg = <0>;
                                device_type = "ethernet-phy";
                        };
                        phy1: ethernet-phy@1 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <35 0>;
+                               interrupts = <5 0>;
                                reg = <1>;
                                device_type = "ethernet-phy";
                        };
@@ -101,7 +101,7 @@
                        compatible = "gianfar";
                        reg = <24000 1000>;
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <d 2 e 2 12 2>;
+                       interrupts = <1d 2 1e 2 22 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy0>;
                };
@@ -114,7 +114,7 @@
                        compatible = "gianfar";
                        reg = <25000 1000>;
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <13 2 14 2 18 2>;
+                       interrupts = <23 2 24 2 28 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy1>;
                };
@@ -124,7 +124,7 @@
                        compatible = "ns16550";
                        reg = <4500 100>;       // reg base, size
                        clock-frequency = <0>;  // should we fill in in uboot?
-                       interrupts = <1a 2>;
+                       interrupts = <2a 2>;
                        interrupt-parent = <&mpic>;
                };
 
@@ -133,7 +133,7 @@
                        compatible = "ns16550";
                        reg = <4600 100>;       // reg base, size
                        clock-frequency = <0>;  // should we fill in in uboot?
-                       interrupts = <1a 2>;
+                       interrupts = <2a 2>;
                        interrupt-parent = <&mpic>;
                };
 
@@ -142,49 +142,49 @@
                        interrupt-map = <
 
                                /* IDSEL 0x10 */
-                               08000 0 0 1 &mpic 30 1
-                               08000 0 0 2 &mpic 31 1
-                               08000 0 0 3 &mpic 32 1
-                               08000 0 0 4 &mpic 33 1
+                               08000 0 0 1 &mpic 0 1
+                               08000 0 0 2 &mpic 1 1
+                               08000 0 0 3 &mpic 2 1
+                               08000 0 0 4 &mpic 3 1
 
                                /* IDSEL 0x11 */
-                               08800 0 0 1 &mpic 30 1
-                               08800 0 0 2 &mpic 31 1
-                               08800 0 0 3 &mpic 32 1
-                               08800 0 0 4 &mpic 33 1
+                               08800 0 0 1 &mpic 0 1
+                               08800 0 0 2 &mpic 1 1
+                               08800 0 0 3 &mpic 2 1
+                               08800 0 0 4 &mpic 3 1
 
                                /* IDSEL 0x12 (Slot 1) */
-                               09000 0 0 1 &mpic 30 1
-                               09000 0 0 2 &mpic 31 1
-                               09000 0 0 3 &mpic 32 1
-                               09000 0 0 4 &mpic 33 1
+                               09000 0 0 1 &mpic 0 1
+                               09000 0 0 2 &mpic 1 1
+                               09000 0 0 3 &mpic 2 1
+                               09000 0 0 4 &mpic 3 1
 
                                /* IDSEL 0x13 (Slot 2) */
-                               09800 0 0 1 &mpic 31 1
-                               09800 0 0 2 &mpic 32 1
-                               09800 0 0 3 &mpic 33 1
-                               09800 0 0 4 &mpic 30 1
+                               09800 0 0 1 &mpic 1 1
+                               09800 0 0 2 &mpic 2 1
+                               09800 0 0 3 &mpic 3 1
+                               09800 0 0 4 &mpic 0 1
 
                                /* IDSEL 0x14 (Slot 3) */
-                               0a000 0 0 1 &mpic 32 1
-                               0a000 0 0 2 &mpic 33 1
-                               0a000 0 0 3 &mpic 30 1
-                               0a000 0 0 4 &mpic 31 1
+                               0a000 0 0 1 &mpic 2 1
+                               0a000 0 0 2 &mpic 3 1
+                               0a000 0 0 3 &mpic 0 1
+                               0a000 0 0 4 &mpic 1 1
 
                                /* IDSEL 0x15 (Slot 4) */
-                               0a800 0 0 1 &mpic 33 1
-                               0a800 0 0 2 &mpic 30 1
-                               0a800 0 0 3 &mpic 31 1
-                               0a800 0 0 4 &mpic 32 1
+                               0a800 0 0 1 &mpic 3 1
+                               0a800 0 0 2 &mpic 0 1
+                               0a800 0 0 3 &mpic 1 1
+                               0a800 0 0 4 &mpic 2 1
 
                                /* Bus 1 (Tundra Bridge) */
                                /* IDSEL 0x12 (ISA bridge) */
-                               19000 0 0 1 &mpic 30 1
-                               19000 0 0 2 &mpic 31 1
-                               19000 0 0 3 &mpic 32 1
-                               19000 0 0 4 &mpic 33 1>;
+                               19000 0 0 1 &mpic 0 1
+                               19000 0 0 2 &mpic 1 1
+                               19000 0 0 3 &mpic 2 1
+                               19000 0 0 4 &mpic 3 1>;
                        interrupt-parent = <&mpic>;
-                       interrupts = <08 2>;
+                       interrupts = <18 2>;
                        bus-range = <0 0>;
                        ranges = <02000000 0 80000000 80000000 0 20000000
                                  01000000 0 00000000 e2000000 0 00100000>;
@@ -216,12 +216,12 @@
                        interrupt-map = <
 
                                /* IDSEL 0x15 */
-                               a800 0 0 1 &mpic 3b 1
-                               a800 0 0 2 &mpic 3b 1
-                               a800 0 0 3 &mpic 3b 1
-                               a800 0 0 4 &mpic 3b 1>;
+                               a800 0 0 1 &mpic b 1
+                               a800 0 0 2 &mpic b 1
+                               a800 0 0 3 &mpic b 1
+                               a800 0 0 4 &mpic b 1>;
                        interrupt-parent = <&mpic>;
-                       interrupts = <09 2>;
+                       interrupts = <19 2>;
                        bus-range = <0 0>;
                        ranges = <02000000 0 a0000000 a0000000 0 20000000
                                  01000000 0 00000000 e3000000 0 00100000>;

diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 3033599..8285925 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -52,7 +52,7 @@
                        compatible = "fsl,8544-memory-controller";
                        reg = <2000 1000>;
                        interrupt-parent = <&mpic>;
-                       interrupts = <2 2>;
+                       interrupts = <12 2>;
                };
 
                l2-cache-controller@20000 {
@@ -61,14 +61,14 @@
                        cache-line-size = <20>; // 32 bytes
                        cache-size = <40000>;   // L2, 256K
                        interrupt-parent = <&mpic>;
-                       interrupts = <0 2>;
+                       interrupts = <10 2>;
                };
 
                i2c@3000 {
                        device_type = "i2c";
                        compatible = "fsl-i2c";
                        reg = <3000 100>;
-                       interrupts = <1b 2>;
+                       interrupts = <2b 2>;
                        interrupt-parent = <&mpic>;
                        dfsrr;
                };
@@ -81,13 +81,13 @@
                        reg = <24520 20>;
                        phy0: ethernet-phy@0 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <3a 1>;
+                               interrupts = <a 1>;
                                reg = <0>;
                                device_type = "ethernet-phy";
                        };
                        phy1: ethernet-phy@1 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <3a 1>;
+                               interrupts = <a 1>;
                                reg = <1>;
                                device_type = "ethernet-phy";
                        };
@@ -101,7 +101,7 @@
                        compatible = "gianfar";
                        reg = <24000 1000>;
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <d 2 e 2 12 2>;
+                       interrupts = <1d 2 1e 2 22 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy0>;
                };
@@ -114,7 +114,7 @@
                        compatible = "gianfar";
                        reg = <26000 1000>;
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <f 2 10 2 11 2>;
+                       interrupts = <1f 2 20 2 21 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy1>;
                };
@@ -124,7 +124,7 @@
                        compatible = "ns16550";
                        reg = <4500 100>;
                        clock-frequency = <0>;
-                       interrupts = <1a 2>;
+                       interrupts = <2a 2>;
                        interrupt-parent = <&mpic>;
                };
 
@@ -133,7 +133,7 @@
                        compatible = "ns16550";
                        reg = <4600 100>;
                        clock-frequency = <0>;
-                       interrupts = <1a 2>;
+                       interrupts = <2a 2>;
                        interrupt-parent = <&mpic>;
                };
 

diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index ea9b126..2293036 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -52,7 +52,7 @@
                        compatible = "fsl,8548-memory-controller";
                        reg = <2000 1000>;
                        interrupt-parent = <&mpic>;
-                       interrupts = <2 2>;
+                       interrupts = <12 2>;
                };
 
                l2-cache-controller@20000 {
@@ -61,14 +61,14 @@
                        cache-line-size = <20>; // 32 bytes
                        cache-size = <80000>;   // L2, 512K
                        interrupt-parent = <&mpic>;
-                       interrupts = <0 2>;
+                       interrupts = <10 2>;
                };
 
                i2c@3000 {
                        device_type = "i2c";
                        compatible = "fsl-i2c";
                        reg = <3000 100>;
-                       interrupts = <1b 2>;
+                       interrupts = <2b 2>;
                        interrupt-parent = <&mpic>;
                        dfsrr;
                };
@@ -81,25 +81,25 @@
                        reg = <24520 20>;
                        phy0: ethernet-phy@0 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <35 0>;
+                               interrupts = <5 0>;
                                reg = <0>;
                                device_type = "ethernet-phy";
                        };
                        phy1: ethernet-phy@1 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <35 0>;
+                               interrupts = <5 0>;
                                reg = <1>;
                                device_type = "ethernet-phy";
                        };
                        phy2: ethernet-phy@2 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <35 0>;
+                               interrupts = <5 0>;
                                reg = <2>;
                                device_type = "ethernet-phy";
                        };
                        phy3: ethernet-phy@3 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <35 0>;
+                               interrupts = <5 0>;
                                reg = <3>;
                                device_type = "ethernet-phy";
                        };
@@ -113,7 +113,7 @@
                        compatible = "gianfar";
                        reg = <24000 1000>;
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <d 2 e 2 12 2>;
+                       interrupts = <1d 2 1e 2 22 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy0>;
                };
@@ -126,7 +126,7 @@
                        compatible = "gianfar";
                        reg = <25000 1000>;
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <13 2 14 2 18 2>;
+                       interrupts = <23 2 24 2 28 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy1>;
                };
@@ -140,7 +140,7 @@
                        compatible = "gianfar";
                        reg = <26000 1000>;
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <f 2 10 2 11 2>;
+                       interrupts = <1f 2 20 2 21 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy2>;
                };
@@ -153,7 +153,7 @@
                        compatible = "gianfar";
                        reg = <27000 1000>;
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <15 2 16 2 17 2>;
+                       interrupts = <25 2 26 2 27 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy3>;
                };
@@ -164,7 +164,7 @@
                        compatible = "ns16550";
                        reg = <4500 100>;       // reg base, size
                        clock-frequency = <0>;  // should we fill in in uboot?
-                       interrupts = <1a 2>;
+                       interrupts = <2a 2>;
                        interrupt-parent = <&mpic>;
                };
 
@@ -173,7 +173,7 @@
                        compatible = "ns16550";
                        reg = <4600 100>;       // reg base, size
                        clock-frequency = <0>;  // should we fill in in uboot?
-                       interrupts = <1a 2>;
+                       interrupts = <2a 2>;
                        interrupt-parent = <&mpic>;
                };
 
@@ -188,49 +188,49 @@
                        interrupt-map = <
 
                                /* IDSEL 0x10 */
-                               08000 0 0 1 &mpic 30 1
-                               08000 0 0 2 &mpic 31 1
-                               08000 0 0 3 &mpic 32 1
-                               08000 0 0 4 &mpic 33 1
+                               08000 0 0 1 &mpic 0 1
+                               08000 0 0 2 &mpic 1 1
+                               08000 0 0 3 &mpic 2 1
+                               08000 0 0 4 &mpic 3 1
 
                                /* IDSEL 0x11 */
-                               08800 0 0 1 &mpic 30 1
-                               08800 0 0 2 &mpic 31 1
-                               08800 0 0 3 &mpic 32 1
-                               08800 0 0 4 &mpic 33 1
+                               08800 0 0 1 &mpic 0 1
+                               08800 0 0 2 &mpic 1 1
+                               08800 0 0 3 &mpic 2 1
+                               08800 0 0 4 &mpic 3 1
 
                                /* IDSEL 0x12 (Slot 1) */
-                               09000 0 0 1 &mpic 30 1
-                               09000 0 0 2 &mpic 31 1
-                               09000 0 0 3 &mpic 32 1
-                               09000 0 0 4 &mpic 33 1
+                               09000 0 0 1 &mpic 0 1
+                               09000 0 0 2 &mpic 1 1
+                               09000 0 0 3 &mpic 2 1
+                               09000 0 0 4 &mpic 3 1
 
                                /* IDSEL 0x13 (Slot 2) */
-                               09800 0 0 1 &mpic 31 1
-                               09800 0 0 2 &mpic 32 1
-                               09800 0 0 3 &mpic 33 1
-                               09800 0 0 4 &mpic 30 1
+                               09800 0 0 1 &mpic 1 1
+                               09800 0 0 2 &mpic 2 1
+                               09800 0 0 3 &mpic 3 1
+                               09800 0 0 4 &mpic 0 1
 
                                /* IDSEL 0x14 (Slot 3) */
-                               0a000 0 0 1 &mpic 32 1
-                               0a000 0 0 2 &mpic 33 1
-                               0a000 0 0 3 &mpic 30 1
-                               0a000 0 0 4 &mpic 31 1
+                               0a000 0 0 1 &mpic 2 1
+                               0a000 0 0 2 &mpic 3 1
+                               0a000 0 0 3 &mpic 0 1
+                               0a000 0 0 4 &mpic 1 1
 
                                /* IDSEL 0x15 (Slot 4) */
-                               0a800 0 0 1 &mpic 33 1
-                               0a800 0 0 2 &mpic 30 1
-                               0a800 0 0 3 &mpic 31 1
-                               0a800 0 0 4 &mpic 32 1
+                               0a800 0 0 1 &mpic 3 1
+                               0a800 0 0 2 &mpic 0 1
+                               0a800 0 0 3 &mpic 1 1
+                               0a800 0 0 4 &mpic 2 1
 
                                /* Bus 1 (Tundra Bridge) */
                                /* IDSEL 0x12 (ISA bridge) */
-                               19000 0 0 1 &mpic 30 1
-                               19000 0 0 2 &mpic 31 1
-                               19000 0 0 3 &mpic 32 1
-                               19000 0 0 4 &mpic 33 1>;
+                               19000 0 0 1 &mpic 0 1
+                               19000 0 0 2 &mpic 1 1
+                               19000 0 0 3 &mpic 2 1
+                               19000 0 0 4 &mpic 3 1>;
                        interrupt-parent = <&mpic>;
-                       interrupts = <08 2>;
+                       interrupts = <18 2>;
                        bus-range = <0 0>;
                        ranges = <02000000 0 80000000 80000000 0 20000000
                                  01000000 0 00000000 e2000000 0 00100000>;
@@ -262,12 +262,12 @@
                        interrupt-map = <
 
                                /* IDSEL 0x15 */
-                               a800 0 0 1 &mpic 3b 1
-                               a800 0 0 2 &mpic 3b 1
-                               a800 0 0 3 &mpic 3b 1
-                               a800 0 0 4 &mpic 3b 1>;
+                               a800 0 0 1 &mpic b 1
+                               a800 0 0 2 &mpic b 1
+                               a800 0 0 3 &mpic b 1
+                               a800 0 0 4 &mpic b 1>;
                        interrupt-parent = <&mpic>;
-                       interrupts = <09 2>;
+                       interrupts = <19 2>;
                        bus-range = <0 0>;
                        ranges = <02000000 0 a0000000 a0000000 0 20000000
                                  01000000 0 00000000 e3000000 0 00100000>;

diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index c41ee61..9b72689 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -52,7 +52,7 @@
                        compatible = "fsl,8555-memory-controller";
                        reg = <2000 1000>;
                        interrupt-parent = <&mpic>;
-                       interrupts = <2 2>;
+                       interrupts = <12 2>;
                };
 
                l2-cache-controller@20000 {
@@ -61,14 +61,14 @@
                        cache-line-size = <20>; // 32 bytes
                        cache-size = <40000>;   // L2, 256K
                        interrupt-parent = <&mpic>;
-                       interrupts = <0 2>;
+                       interrupts = <10 2>;
                };
 
                i2c@3000 {
                        device_type = "i2c";
                        compatible = "fsl-i2c";
                        reg = <3000 100>;
-                       interrupts = <1b 2>;
+                       interrupts = <2b 2>;
                        interrupt-parent = <&mpic>;
                        dfsrr;
                };
@@ -81,13 +81,13 @@
                        reg = <24520 20>;
                        phy0: ethernet-phy@0 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <35 0>;
+                               interrupts = <5 0>;
                                reg = <0>;
                                device_type = "ethernet-phy";
                        };
                        phy1: ethernet-phy@1 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <35 0>;
+                               interrupts = <5 0>;
                                reg = <1>;
                                device_type = "ethernet-phy";
                        };
@@ -101,7 +101,7 @@
                        compatible = "gianfar";
                        reg = <24000 1000>;
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <0d 2 0e 2 12 2>;
+                       interrupts = <1d 2 1e 2 22 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy0>;
                };
@@ -114,7 +114,7 @@
                        compatible = "gianfar";
                        reg = <25000 1000>;
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <13 2 14 2 18 2>;
+                       interrupts = <23 2 24 2 28 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy1>;
                };
@@ -124,7 +124,7 @@
                        compatible = "ns16550";
                        reg = <4500 100>;       // reg base, size
                        clock-frequency = <0>;  // should we fill in in uboot?
-                       interrupts = <1a 2>;
+                       interrupts = <2a 2>;
                        interrupt-parent = <&mpic>;
                };
 
@@ -133,7 +133,7 @@
                        compatible = "ns16550";
                        reg = <4600 100>;       // reg base, size
                        clock-frequency = <0>;  // should we fill in in uboot?
-                       interrupts = <1a 2>;
+                       interrupts = <2a 2>;
                        interrupt-parent = <&mpic>;
                };
 
@@ -142,49 +142,49 @@
                        interrupt-map = <
 
                                /* IDSEL 0x10 */
-                               08000 0 0 1 &mpic 30 1
-                               08000 0 0 2 &mpic 31 1
-                               08000 0 0 3 &mpic 32 1
-                               08000 0 0 4 &mpic 33 1
+                               08000 0 0 1 &mpic 0 1
+                               08000 0 0 2 &mpic 1 1
+                               08000 0 0 3 &mpic 2 1
+                               08000 0 0 4 &mpic 3 1
 
                                /* IDSEL 0x11 */
-                               08800 0 0 1 &mpic 30 1
-                               08800 0 0 2 &mpic 31 1
-                               08800 0 0 3 &mpic 32 1
-                               08800 0 0 4 &mpic 33 1
+                               08800 0 0 1 &mpic 0 1
+                               08800 0 0 2 &mpic 1 1
+                               08800 0 0 3 &mpic 2 1
+                               08800 0 0 4 &mpic 3 1
 
                                /* IDSEL 0x12 (Slot 1) */
-                               09000 0 0 1 &mpic 30 1
-                               09000 0 0 2 &mpic 31 1
-                               09000 0 0 3 &mpic 32 1
-                               09000 0 0 4 &mpic 33 1
+                               09000 0 0 1 &mpic 0 1
+                               09000 0 0 2 &mpic 1 1
+                               09000 0 0 3 &mpic 2 1
+                               09000 0 0 4 &mpic 3 1
 
                                /* IDSEL 0x13 (Slot 2) */
-                               09800 0 0 1 &mpic 31 1
-                               09800 0 0 2 &mpic 32 1
-                               09800 0 0 3 &mpic 33 1
-                               09800 0 0 4 &mpic 30 1
+                               09800 0 0 1 &mpic 1 1
+                               09800 0 0 2 &mpic 2 1
+                               09800 0 0 3 &mpic 3 1
+                               09800 0 0 4 &mpic 0 1
 
                                /* IDSEL 0x14 (Slot 3) */
-                               0a000 0 0 1 &mpic 32 1
-                               0a000 0 0 2 &mpic 33 1
-                               0a000 0 0 3 &mpic 30 1
-                               0a000 0 0 4 &mpic 31 1
+                               0a000 0 0 1 &mpic 2 1
+                               0a000 0 0 2 &mpic 3 1
+                               0a000 0 0 3 &mpic 0 1
+                               0a000 0 0 4 &mpic 1 1
 
                                /* IDSEL 0x15 (Slot 4) */
-                               0a800 0 0 1 &mpic 33 1
-                               0a800 0 0 2 &mpic 30 1
-                               0a800 0 0 3 &mpic 31 1
-                               0a800 0 0 4 &mpic 32 1
+                               0a800 0 0 1 &mpic 3 1
+                               0a800 0 0 2 &mpic 0 1
+                               0a800 0 0 3 &mpic 1 1
+                               0a800 0 0 4 &mpic 2 1
 
                                /* Bus 1 (Tundra Bridge) */
                                /* IDSEL 0x12 (ISA bridge) */
-                               19000 0 0 1 &mpic 30 1
-                               19000 0 0 2 &mpic 31 1
-                               19000 0 0 3 &mpic 32 1
-                               19000 0 0 4 &mpic 33 1>;
+                               19000 0 0 1 &mpic 0 1
+                               19000 0 0 2 &mpic 1 1
+                               19000 0 0 3 &mpic 2 1
+                               19000 0 0 4 &mpic 3 1>;
                        interrupt-parent = <&mpic>;
-                       interrupts = <08 2>;
+                       interrupts = <18 2>;
                        bus-range = <0 0>;
                        ranges = <02000000 0 80000000 80000000 0 20000000
                                  01000000 0 00000000 e2000000 0 00100000>;
@@ -216,12 +216,12 @@
                        interrupt-map = <
 
                                /* IDSEL 0x15 */
-                               a800 0 0 1 &mpic 3b 1
-                               a800 0 0 2 &mpic 3b 1
-                               a800 0 0 3 &mpic 3b 1
-                               a800 0 0 4 &mpic 3b 1>;
+                               a800 0 0 1 &mpic b 1
+                               a800 0 0 2 &mpic b 1
+                               a800 0 0 3 &mpic b 1
+                               a800 0 0 4 &mpic b 1>;
                        interrupt-parent = <&mpic>;
-                       interrupts = <09 2>;
+                       interrupts = <19 2>;
                        bus-range = <0 0>;
                        ranges = <02000000 0 a0000000 a0000000 0 20000000
                                  01000000 0 00000000 e3000000 0 00100000>;

diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 205ee32..2d41d54 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -52,7 +52,7 @@
                        compatible = "fsl,8540-memory-controller";
                        reg = <2000 1000>;
                        interrupt-parent = <&mpic>;
-                       interrupts = <2 2>;
+                       interrupts = <12 2>;
                };
 
                l2-cache-controller@20000 {
@@ -61,7 +61,7 @@
                        cache-line-size = <20>; // 32 bytes
                        cache-size = <40000>;   // L2, 256K
                        interrupt-parent = <&mpic>;
-                       interrupts = <0 2>;
+                       interrupts = <10 2>;
                };
 
                mdio@24520 {
@@ -72,25 +72,25 @@
                        #size-cells = <0>;
                        phy0: ethernet-phy@0 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <35 1>;
+                               interrupts = <5 1>;
                                reg = <0>;
                                device_type = "ethernet-phy";
                        };
                        phy1: ethernet-phy@1 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <35 1>;
+                               interrupts = <5 1>;
                                reg = <1>;
                                device_type = "ethernet-phy";
                        };
                        phy2: ethernet-phy@2 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <37 1>;
+                               interrupts = <7 1>;
                                reg = <2>;
                                device_type = "ethernet-phy";
                        };
                        phy3: ethernet-phy@3 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <37 1>;
+                               interrupts = <7 1>;
                                reg = <3>;
                                device_type = "ethernet-phy";
                        };
@@ -108,7 +108,7 @@
                         */
                        address = [ 00 00 00 00 00 00 ];
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <d 2 e 2 12 2>;
+                       interrupts = <1d 2 1e 2 22 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy0>;
                };
@@ -127,7 +127,7 @@
                         */
                        address = [ 00 00 00 00 00 00 ];
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <13 2 14 2 18 2>;
+                       interrupts = <23 2 24 2 28 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy1>;
                };
@@ -144,79 +144,79 @@
                        interrupt-map = <
 
                                        /* IDSEL 0x2 */
-                                        1000 0 0 1 &mpic 31 1
-                                        1000 0 0 2 &mpic 32 1
-                                        1000 0 0 3 &mpic 33 1
-                                        1000 0 0 4 &mpic 34 1
+                                        1000 0 0 1 &mpic 1 1
+                                        1000 0 0 2 &mpic 2 1
+                                        1000 0 0 3 &mpic 3 1
+                                        1000 0 0 4 &mpic 4 1
 
                                        /* IDSEL 0x3 */
-                                        1800 0 0 1 &mpic 34 1
-                                        1800 0 0 2 &mpic 31 1
-                                        1800 0 0 3 &mpic 32 1
-                                        1800 0 0 4 &mpic 33 1
+                                        1800 0 0 1 &mpic 4 1
+                                        1800 0 0 2 &mpic 1 1
+                                        1800 0 0 3 &mpic 2 1
+                                        1800 0 0 4 &mpic 3 1
 
                                        /* IDSEL 0x4 */
-                                        2000 0 0 1 &mpic 33 1
-                                        2000 0 0 2 &mpic 34 1
-                                        2000 0 0 3 &mpic 31 1
-                                        2000 0 0 4 &mpic 32 1
+                                        2000 0 0 1 &mpic 3 1
+                                        2000 0 0 2 &mpic 4 1
+                                        2000 0 0 3 &mpic 1 1
+                                        2000 0 0 4 &mpic 2 1
 
                                        /* IDSEL 0x5  */
-                                        2800 0 0 1 &mpic 32 1
-                                        2800 0 0 2 &mpic 33 1
-                                        2800 0 0 3 &mpic 34 1
-                                        2800 0 0 4 &mpic 31 1
+                                        2800 0 0 1 &mpic 2 1
+                                        2800 0 0 2 &mpic 3 1
+                                        2800 0 0 3 &mpic 4 1
+                                        2800 0 0 4 &mpic 1 1
 
                                        /* IDSEL 12 */
-                                        6000 0 0 1 &mpic 31 1
-                                        6000 0 0 2 &mpic 32 1
-                                        6000 0 0 3 &mpic 33 1
-                                        6000 0 0 4 &mpic 34 1
+                                        6000 0 0 1 &mpic 1 1
+                                        6000 0 0 2 &mpic 2 1
+                                        6000 0 0 3 &mpic 3 1
+                                        6000 0 0 4 &mpic 4 1
 
                                        /* IDSEL 13 */
-                                        6800 0 0 1 &mpic 34 1
-                                        6800 0 0 2 &mpic 31 1
-                                        6800 0 0 3 &mpic 32 1
-                                        6800 0 0 4 &mpic 33 1
+                                        6800 0 0 1 &mpic 4 1
+                                        6800 0 0 2 &mpic 1 1
+                                        6800 0 0 3 &mpic 2 1
+                                        6800 0 0 4 &mpic 3 1
 
                                        /* IDSEL 14*/
-                                        7000 0 0 1 &mpic 33 1
-                                        7000 0 0 2 &mpic 34 1
-                                        7000 0 0 3 &mpic 31 1
-                                        7000 0 0 4 &mpic 32 1
+                                        7000 0 0 1 &mpic 3 1
+                                        7000 0 0 2 &mpic 4 1
+                                        7000 0 0 3 &mpic 1 1
+                                        7000 0 0 4 &mpic 2 1
 
                                        /* IDSEL 15 */
-                                        7800 0 0 1 &mpic 32 1
-                                        7800 0 0 2 &mpic 33 1
-                                        7800 0 0 3 &mpic 34 1
-                                        7800 0 0 4 &mpic 31 1
+                                        7800 0 0 1 &mpic 2 1
+                                        7800 0 0 2 &mpic 3 1
+                                        7800 0 0 3 &mpic 4 1
+                                        7800 0 0 4 &mpic 1 1
 
                                        /* IDSEL 18 */
-                                        9000 0 0 1 &mpic 31 1
-                                        9000 0 0 2 &mpic 32 1
-                                        9000 0 0 3 &mpic 33 1
-                                        9000 0 0 4 &mpic 34 1
+                                        9000 0 0 1 &mpic 1 1
+                                        9000 0 0 2 &mpic 2 1
+                                        9000 0 0 3 &mpic 3 1
+                                        9000 0 0 4 &mpic 4 1
 
                                        /* IDSEL 19 */
-                                        9800 0 0 1 &mpic 34 1
-                                        9800 0 0 2 &mpic 31 1
-                                        9800 0 0 3 &mpic 32 1
-                                        9800 0 0 4 &mpic 33 1
+                                        9800 0 0 1 &mpic 4 1
+                                        9800 0 0 2 &mpic 1 1
+                                        9800 0 0 3 &mpic 2 1
+                                        9800 0 0 4 &mpic 3 1
 
                                        /* IDSEL 20 */
-                                        a000 0 0 1 &mpic 33 1
-                                        a000 0 0 2 &mpic 34 1
-                                        a000 0 0 3 &mpic 31 1
-                                        a000 0 0 4 &mpic 32 1
+                                        a000 0 0 1 &mpic 3 1
+                                        a000 0 0 2 &mpic 4 1
+                                        a000 0 0 3 &mpic 1 1
+                                        a000 0 0 4 &mpic 2 1
 
                                        /* IDSEL 21 */
-                                        a800 0 0 1 &mpic 32 1
-                                        a800 0 0 2 &mpic 33 1
-                                        a800 0 0 3 &mpic 34 1
-                                        a800 0 0 4 &mpic 31 1>;
+                                        a800 0 0 1 &mpic 2 1
+                                        a800 0 0 2 &mpic 3 1
+                                        a800 0 0 3 &mpic 4 1
+                                        a800 0 0 4 &mpic 1 1>;
 
                        interrupt-parent = <&mpic>;
-                       interrupts = <8 0>;
+                       interrupts = <18 0>;
                        bus-range = <0 0>;
                        ranges = <02000000 0 80000000 80000000 0 20000000
                                  01000000 0 00000000 e2000000 0 01000000>;
@@ -246,7 +246,7 @@
                                interrupt-controller;
                                #address-cells = <0>;
                                #interrupt-cells = <2>;
-                               interrupts = <1e 0>;
+                               interrupts = <2e 0>;
                                interrupt-parent = <&mpic>;
                                reg = <90c00 80>;
                                built-in;

diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 479a7a5..6bb18f2 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -61,7 +61,7 @@
                        compatible = "fsl,8568-memory-controller";
                        reg = <2000 1000>;
                        interrupt-parent = <&mpic>;
-                       interrupts = <2 2>;
+                       interrupts = <12 2>;
                };
 
                l2-cache-controller@20000 {
@@ -70,14 +70,14 @@
                        cache-line-size = <20>; // 32 bytes
                        cache-size = <80000>;   // L2, 512K
                        interrupt-parent = <&mpic>;
-                       interrupts = <0 2>;
+                       interrupts = <10 2>;
                };
 
                i2c@3000 {
                        device_type = "i2c";
                        compatible = "fsl-i2c";
                        reg = <3000 100>;
-                       interrupts = <1b 2>;
+                       interrupts = <2b 2>;
                        interrupt-parent = <&mpic>;
                        dfsrr;
                };
@@ -86,7 +86,7 @@
                        device_type = "i2c";
                        compatible = "fsl-i2c";
                        reg = <3100 100>;
-                       interrupts = <1b 2>;
+                       interrupts = <2b 2>;
                        interrupt-parent = <&mpic>;
                        dfsrr;
                };
@@ -99,25 +99,25 @@
                        reg = <24520 20>;
                        phy0: ethernet-phy@0 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <31 1>;
+                               interrupts = <1 1>;
                                reg = <0>;
                                device_type = "ethernet-phy";
                        };
                        phy1: ethernet-phy@1 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <32 1>;
+                               interrupts = <2 1>;
                                reg = <1>;
                                device_type = "ethernet-phy";
                        };
                        phy2: ethernet-phy@2 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <31 1>;
+                               interrupts = <1 1>;
                                reg = <2>;
                                device_type = "ethernet-phy";
                        };
                        phy3: ethernet-phy@3 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <32 1>;
+                               interrupts = <2 1>;
                                reg = <3>;
                                device_type = "ethernet-phy";
                        };
@@ -137,7 +137,7 @@
                         */
                        mac-address = [ 00 00 00 00 00 00 ];
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <d 2 e 2 12 2>;
+                       interrupts = <1d 2 1e 2 22 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy2>;
                };
@@ -156,7 +156,7 @@
                         */
                        mac-address = [ 00 00 00 00 00 00 ];
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <13 2 14 2 18 2>;
+                       interrupts = <23 2 24 2 28 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy3>;
                };
@@ -166,7 +166,7 @@
                        compatible = "ns16550";
                        reg = <4500 100>;
                        clock-frequency = <0>;
-                       interrupts = <1a 2>;
+                       interrupts = <2a 2>;
                        interrupt-parent = <&mpic>;
                };
 
@@ -175,7 +175,7 @@
                        compatible = "ns16550";
                        reg = <4600 100>;
                        clock-frequency = <0>;
-                       interrupts = <1a 2>;
+                       interrupts = <2a 2>;
                        interrupt-parent = <&mpic>;
                };
 
@@ -184,7 +184,7 @@
                        model = "SEC2";
                        compatible = "talitos";
                        reg = <30000 f000>;
-                       interrupts = <1d 2>;
+                       interrupts = <2d 2>;
                        interrupt-parent = <&mpic>;
                        num-channels = <4>;
                        channel-fifo-len = <18>;
@@ -359,25 +359,25 @@
                         * gianfar's MDIO bus */
                        qe_phy0: ethernet-phy@00 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <31 1>;
+                               interrupts = <1 1>;
                                reg = <0>;
                                device_type = "ethernet-phy";
                        };
                        qe_phy1: ethernet-phy@01 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <32 1>;
+                               interrupts = <2 1>;
                                reg = <1>;
                                device_type = "ethernet-phy";
                        };
                        qe_phy2: ethernet-phy@02 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <31 1>;
+                               interrupts = <1 1>;
                                reg = <2>;
                                device_type = "ethernet-phy";
                        };
                        qe_phy3: ethernet-phy@03 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <32 1>;
+                               interrupts = <2 1>;
                                reg = <3>;
                                device_type = "ethernet-phy";
                        };
@@ -391,7 +391,7 @@
                        reg = <80 80>;
                        built-in;
                        big-endian;
-                       interrupts = <1e 2 1e 2>; //high:30 low:30
+                       interrupts = <2e 2 2e 2>; //high:30 low:30
                        interrupt-parent = <&mpic>;
                };
 

diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 4b8ac72..db56a02 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -90,25 +90,25 @@
                        reg = <24520 20>;
                        phy0: ethernet-phy@0 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <4a 1>;
+                               interrupts = <a 1>;
                                reg = <0>;
                                device_type = "ethernet-phy";
                        };
                        phy1: ethernet-phy@1 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <4a 1>;
+                               interrupts = <a 1>;
                                reg = <1>;
                                device_type = "ethernet-phy";
                        };
                        phy2: ethernet-phy@2 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <4a 1>;
+                               interrupts = <a 1>;
                                reg = <2>;
                                device_type = "ethernet-phy";
                        };
                        phy3: ethernet-phy@3 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <4a 1>;
+                               interrupts = <a 1>;
                                reg = <3>;
                                device_type = "ethernet-phy";
                        };
@@ -356,7 +356,7 @@
                                                        #interrupt-cells = <2>;
                                                        built-in;
                                                        compatible = "chrp,iic";
-                                                       interrupts = <49 2>;
+                                                       interrupts = <9 2>;
                                                        interrupt-parent =
                                                                <&mpic>;
                                                };
@@ -411,10 +411,10 @@
                        interrupt-map-mask = <f800 0 0 7>;
                        interrupt-map = <
                                /* IDSEL 0x0 */
-                               0000 0 0 1 &mpic 44 1
-                               0000 0 0 2 &mpic 45 1
-                               0000 0 0 3 &mpic 46 1
-                               0000 0 0 4 &mpic 47 1
+                               0000 0 0 1 &mpic 4 1
+                               0000 0 0 2 &mpic 5 1
+                               0000 0 0 3 &mpic 6 1
+                               0000 0 0 4 &mpic 7 1
                                >;
                };
 

diff --git a/arch/powerpc/platforms/85xx/mpc8544_ds.c b/arch/powerpc/platforms/85xx/mpc8544_ds.c
index bec84ff..6fb90aa 100644 (file)
--- a/arch/powerpc/platforms/85xx/mpc8544_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8544_ds.c
@@ -61,24 +61,11 @@ void __init mpc8544_ds_pic_init(void)
                return;
        }
 
-       /* Alloc mpic structure and per isu has 16 INT entries. */
        mpic = mpic_alloc(np, r.start,
                          MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
-                         16, 64, " OPENPIC     ");
+                       0, 256, " OpenPIC  ");
        BUG_ON(mpic == NULL);
 
-       /*
-        * 48 Internal Interrupts
-        */
-       mpic_assign_isu(mpic, 0, r.start + 0x10200);
-       mpic_assign_isu(mpic, 1, r.start + 0x10400);
-       mpic_assign_isu(mpic, 2, r.start + 0x10600);
-
-       /*
-        * 16 External interrupts
-        */
-       mpic_assign_isu(mpic, 3, r.start + 0x10000);
-
        mpic_init(mpic);
 
 #ifdef CONFIG_PPC_I8259

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 1262d1b..7235f70 100644 (file)
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -87,30 +87,10 @@ static void __init mpc85xx_ads_pic_init(void)
 
        mpic = mpic_alloc(np, r.start,
                        MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
-                       4, 0, " OpenPIC  ");
+                       0, 256, " OpenPIC  ");
        BUG_ON(mpic == NULL);
        of_node_put(np);
 
-       mpic_assign_isu(mpic, 0, r.start + 0x10200);
-       mpic_assign_isu(mpic, 1, r.start + 0x10280);
-       mpic_assign_isu(mpic, 2, r.start + 0x10300);
-       mpic_assign_isu(mpic, 3, r.start + 0x10380);
-       mpic_assign_isu(mpic, 4, r.start + 0x10400);
-       mpic_assign_isu(mpic, 5, r.start + 0x10480);
-       mpic_assign_isu(mpic, 6, r.start + 0x10500);
-       mpic_assign_isu(mpic, 7, r.start + 0x10580);
-
-       /* Unused on this platform (leave room for 8548) */
-       mpic_assign_isu(mpic, 8, r.start + 0x10600);
-       mpic_assign_isu(mpic, 9, r.start + 0x10680);
-       mpic_assign_isu(mpic, 10, r.start + 0x10700);
-       mpic_assign_isu(mpic, 11, r.start + 0x10780);
-
-       /* External Interrupts */
-       mpic_assign_isu(mpic, 12, r.start + 0x10000);
-       mpic_assign_isu(mpic, 13, r.start + 0x10080);
-       mpic_assign_isu(mpic, 14, r.start + 0x10100);
-
        mpic_init(mpic);
 
 #ifdef CONFIG_CPM2

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 04a1eaa..2a80c1d 100644 (file)
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -156,33 +156,12 @@ static void __init mpc85xx_cds_pic_init(void)
 
        mpic = mpic_alloc(np, r.start,
                        MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
-                       4, 0, " OpenPIC  ");
+                       0, 256, " OpenPIC  ");
        BUG_ON(mpic == NULL);
 
        /* Return the mpic node */
        of_node_put(np);
 
-       mpic_assign_isu(mpic, 0, r.start + 0x10200);
-       mpic_assign_isu(mpic, 1, r.start + 0x10280);
-       mpic_assign_isu(mpic, 2, r.start + 0x10300);
-       mpic_assign_isu(mpic, 3, r.start + 0x10380);
-       mpic_assign_isu(mpic, 4, r.start + 0x10400);
-       mpic_assign_isu(mpic, 5, r.start + 0x10480);
-       mpic_assign_isu(mpic, 6, r.start + 0x10500);
-       mpic_assign_isu(mpic, 7, r.start + 0x10580);
-
-       /* Used only for 8548 so far, but no harm in
-        * allocating them for everyone */
-       mpic_assign_isu(mpic, 8, r.start + 0x10600);
-       mpic_assign_isu(mpic, 9, r.start + 0x10680);
-       mpic_assign_isu(mpic, 10, r.start + 0x10700);
-       mpic_assign_isu(mpic, 11, r.start + 0x10780);
-
-       /* External Interrupts */
-       mpic_assign_isu(mpic, 12, r.start + 0x10000);
-       mpic_assign_isu(mpic, 13, r.start + 0x10080);
-       mpic_assign_isu(mpic, 14, r.start + 0x10100);
-
        mpic_init(mpic);
 
 #ifdef CONFIG_PPC_I8259

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index f55ef5b..004b80b 100644 (file)
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -176,29 +176,10 @@ static void __init mpc85xx_mds_pic_init(void)
 
        mpic = mpic_alloc(np, r.start,
                        MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
-                       4, 0, " OpenPIC  ");
+                       0, 256, " OpenPIC  ");
        BUG_ON(mpic == NULL);
        of_node_put(np);
 
-       /* Internal Interrupts */
-       mpic_assign_isu(mpic, 0, r.start + 0x10200);
-       mpic_assign_isu(mpic, 1, r.start + 0x10280);
-       mpic_assign_isu(mpic, 2, r.start + 0x10300);
-       mpic_assign_isu(mpic, 3, r.start + 0x10380);
-       mpic_assign_isu(mpic, 4, r.start + 0x10400);
-       mpic_assign_isu(mpic, 5, r.start + 0x10480);
-       mpic_assign_isu(mpic, 6, r.start + 0x10500);
-       mpic_assign_isu(mpic, 7, r.start + 0x10580);
-       mpic_assign_isu(mpic, 8, r.start + 0x10600);
-       mpic_assign_isu(mpic, 9, r.start + 0x10680);
-       mpic_assign_isu(mpic, 10, r.start + 0x10700);
-       mpic_assign_isu(mpic, 11, r.start + 0x10780);
-
-       /* External Interrupts */
-       mpic_assign_isu(mpic, 12, r.start + 0x10000);
-       mpic_assign_isu(mpic, 13, r.start + 0x10080);
-       mpic_assign_isu(mpic, 14, r.start + 0x10100);
-
        mpic_init(mpic);
 
 #ifdef CONFIG_QUICC_ENGINE

diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 62b8a14..5b01ec7 100644 (file)
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -74,22 +74,9 @@ mpc86xx_hpcn_init_irq(void)
        /* Alloc mpic structure and per isu has 16 INT entries. */
        mpic1 = mpic_alloc(np, res.start,
                        MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
-                       16, NR_IRQS - 4,
-                       " MPIC     ");
+                       0, 256, " MPIC     ");
        BUG_ON(mpic1 == NULL);
 
-       mpic_assign_isu(mpic1, 0, res.start + 0x10000);
-
-       /* 48 Internal Interrupts */
-       mpic_assign_isu(mpic1, 1, res.start + 0x10200);
-       mpic_assign_isu(mpic1, 2, res.start + 0x10400);
-       mpic_assign_isu(mpic1, 3, res.start + 0x10600);
-
-       /* 16 External interrupts
-        * Moving them from [0 - 15] to [64 - 79]
-        */
-       mpic_assign_isu(mpic1, 4, res.start + 0x10000);
-
        mpic_init(mpic1);
 
 #ifdef CONFIG_PCI