arm64: dts: imx93: add flexcan nodes

Add flexcan1 and flexcan2 nodes.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 5d79663..6808321 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -223,6 +223,20 @@
                                status = "disabled";
                        };
 
+                       flexcan1: can@443a0000 {
+                               compatible = "fsl,imx93-flexcan";
+                               reg = <0x443a0000 0x10000>;
+                               interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clk IMX93_CLK_BUS_AON>,
+                                        <&clk IMX93_CLK_CAN1_GATE>;
+                               clock-names = "ipg", "per";
+                               assigned-clocks = <&clk IMX93_CLK_CAN1>;
+                               assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
+                               assigned-clock-rates = <40000000>;
+                               fsl,clk-source = /bits/ 8 <0>;
+                               status = "disabled";
+                       };
+
                        iomuxc: pinctrl@443c0000 {
                                compatible = "fsl,imx93-iomuxc";
                                reg = <0x443c0000 0x10000>;
@@ -393,6 +407,20 @@
                                status = "disabled";
                        };
 
+                       flexcan2: can@425b0000 {
+                               compatible = "fsl,imx93-flexcan";
+                               reg = <0x425b0000 0x10000>;
+                               interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
+                                        <&clk IMX93_CLK_CAN2_GATE>;
+                               clock-names = "ipg", "per";
+                               assigned-clocks = <&clk IMX93_CLK_CAN2>;
+                               assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
+                               assigned-clock-rates = <40000000>;
+                               fsl,clk-source = /bits/ 8 <0>;
+                               status = "disabled";
+                       };
+
                        lpuart7: serial@42690000 {
                                compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
                                reg = <0x42690000 0x1000>;