arm64: dts: imx8-ss-dma: add IPG clock for i2c

i.MX8 LPI2C requires both PER and IPG clock, so add the missed IPG clk.

Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index 960a802..d7b4229 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -111,8 +111,9 @@ dma_subsys: bus@5a000000 {
        i2c0: i2c@5a800000 {
                reg = <0x5a800000 0x4000>;
                interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>;
-               clock-names = "per";
+               clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>,
+                        <&i2c0_lpcg IMX_LPCG_CLK_4>;
+               clock-names = "per", "ipg";
                assigned-clocks = <&clk IMX_SC_R_I2C_0 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <24000000>;
                power-domains = <&pd IMX_SC_R_I2C_0>;
@@ -122,8 +123,9 @@ dma_subsys: bus@5a000000 {
        i2c1: i2c@5a810000 {
                reg = <0x5a810000 0x4000>;
                interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>;
-               clock-names = "per";
+               clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>,
+                        <&i2c1_lpcg IMX_LPCG_CLK_4>;
+               clock-names = "per", "ipg";
                assigned-clocks = <&clk IMX_SC_R_I2C_1 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <24000000>;
                power-domains = <&pd IMX_SC_R_I2C_1>;
@@ -133,8 +135,9 @@ dma_subsys: bus@5a000000 {
        i2c2: i2c@5a820000 {
                reg = <0x5a820000 0x4000>;
                interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>;
-               clock-names = "per";
+               clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>,
+                        <&i2c2_lpcg IMX_LPCG_CLK_4>;
+               clock-names = "per", "ipg";
                assigned-clocks = <&clk IMX_SC_R_I2C_2 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <24000000>;
                power-domains = <&pd IMX_SC_R_I2C_2>;
@@ -144,8 +147,9 @@ dma_subsys: bus@5a000000 {
        i2c3: i2c@5a830000 {
                reg = <0x5a830000 0x4000>;
                interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>;
-               clock-names = "per";
+               clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>,
+                        <&i2c3_lpcg IMX_LPCG_CLK_4>;
+               clock-names = "per", "ipg";
                assigned-clocks = <&clk IMX_SC_R_I2C_3 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <24000000>;
                power-domains = <&pd IMX_SC_R_I2C_3>;