i965/fs: Allow an execution size of 32.

In a few commits, we'll start emitting an add(32) instruction on some
platforms.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 706b66b..44b9ffb 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -213,7 +213,7 @@ validate_reg(const struct brw_context *brw, brw_inst *inst, struct brw_reg reg)
    const int hstride_for_reg[] = {0, 1, 2, 4};
    const int vstride_for_reg[] = {0, 1, 2, 4, 8, 16, 32};
    const int width_for_reg[] = {1, 2, 4, 8, 16};
-   const int execsize_for_reg[] = {1, 2, 4, 8, 16};
+   const int execsize_for_reg[] = {1, 2, 4, 8, 16, 32};
    int width, hstride, vstride, execsize;
 
    if (reg.file == BRW_IMMEDIATE_VALUE) {

diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index ba2a12f..af08f9d 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -1630,6 +1630,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
          }
          break;
       case 16:
+      case 32:
          brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED);
          break;
       default: