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arm64: dts: imx8mn-evk: Add sound-wm8524 card nodes
authorShengjiu Wang <shengjiu.wang@nxp.com>
Mon, 7 Dec 2020 09:12:35 +0000 (17:12 +0800)
committerShawn Guo <shawnguo@kernel.org>
Thu, 7 Jan 2021 03:02:12 +0000 (11:02 +0800)
Add sound-wm8524 card nodes which are supported on imx8mn-evk board.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi

index 76d042a..1d2c399 100644 (file)
                pinctrl-0 = <&pinctrl_ir>;
                linux,autosuspend-period = <125>;
        };
+
+       wm8524: audio-codec {
+               #sound-dai-cells = <0>;
+               compatible = "wlf,wm8524";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpio_wlf>;
+               wlf,mute-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>;
+               clocks = <&clk IMX8MN_CLK_SAI3_ROOT>;
+               clock-names = "mclk";
+       };
+
+       sound-wm8524 {
+               compatible = "fsl,imx-audio-wm8524";
+               model = "wm8524-audio";
+               audio-cpu = <&sai3>;
+               audio-codec = <&wm8524>;
+               audio-asrc = <&easrc>;
+               audio-routing =
+                       "Line Out Jack", "LINEVOUTL",
+                       "Line Out Jack", "LINEVOUTR";
+       };
+};
+
+&easrc {
+       fsl,asrc-rate  = <48000>;
+       status = "okay";
 };
 
 &fec1 {
        };
 };
 
+&sai3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_sai3>;
+       assigned-clocks = <&clk IMX8MN_CLK_SAI3>;
+       assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
+       assigned-clock-rates = <24576000>;
+       fsl,sai-mclk-direction-output;
+       status = "okay";
+};
+
 &snvs_pwrkey {
        status = "okay";
 };
                >;
        };
 
+       pinctrl_gpio_wlf: gpiowlfgrp {
+               fsl,pins = <
+                       MX8MN_IOMUXC_I2C4_SDA_GPIO5_IO21        0xd6
+               >;
+       };
+
        pinctrl_ir: irgrp {
                fsl,pins = <
                        MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13              0x4f
                >;
        };
 
+       pinctrl_sai3: sai3grp {
+               fsl,pins = <
+                       MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC     0xd6
+                       MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK      0xd6
+                       MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK        0xd6
+                       MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0     0xd6
+               >;
+       };
+
        pinctrl_typec1: typec1grp {
                fsl,pins = <
                        MX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11      0x159