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drm/i915/execlists: Record the active CCID from before reset
authorChris Wilson <chris@chris-wilson.co.uk>
Tue, 5 May 2020 08:46:29 +0000 (09:46 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Tue, 5 May 2020 11:05:40 +0000 (12:05 +0100)
If we cannot trust the reset will flush out the CS event queue such that
process_csb() reports an accurate view of HW, we will need to search the
active and pending contexts to determine which was actually running at
the time we issued the reset.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200505084629.31365-1-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/gt/intel_engine_types.h
drivers/gpu/drm/i915/gt/intel_lrc.c

index 6c67677..b1048f0 100644 (file)
@@ -180,6 +180,11 @@ struct intel_engine_execlists {
        u32 error_interrupt;
 
        /**
+        * @reset_ccid: Active CCID [EXECLISTS_STATUS_HI] at the time of reset
+        */
+       u32 reset_ccid;
+
+       /**
         * @no_priolist: priority lists disabled
         */
        bool no_priolist;
index c003663..3ff81c8 100644 (file)
@@ -4074,6 +4074,8 @@ static void execlists_reset_prepare(struct intel_engine_cs *engine)
         */
        ring_set_paused(engine, 1);
        intel_engine_stop_cs(engine);
+
+       engine->execlists.reset_ccid = active_ccid(engine);
 }
 
 static void __reset_stop_ring(u32 *regs, const struct intel_engine_cs *engine)
@@ -4116,7 +4118,7 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
         * its request, it was still running at the time of the
         * reset and will have been clobbered.
         */
-       rq = execlists_active(execlists);
+       rq = active_context(engine, engine->execlists.reset_ccid);
        if (!rq)
                goto unwind;