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ARM: dts: meson: switch the clock controller to the HHI register area
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Fri, 18 Jan 2019 22:52:21 +0000 (23:52 +0100)
committerKevin Hilman <khilman@baylibre.com>
Mon, 11 Feb 2019 20:52:25 +0000 (12:52 -0800)
The clock controller on Meson8/Meson8m2 and Meson8b is part of a
register region called "HHI". This register area contains more
functionality than just a clock controller:
- the clock controller
- some reset controller bits
- temperature sensor calibration data (on Meson8b and Meson8m2 only)
- HDMI controller

Allow access to this HHI register area as "system controller". Also
migrate the Meson8 and Meson8b clock controllers to this new node.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arch/arm/boot/dts/meson.dtsi
arch/arm/boot/dts/meson8.dtsi
arch/arm/boot/dts/meson8b.dtsi

index e4645f6..536d631 100644 (file)
                        #size-cells = <1>;
                        ranges = <0x0 0xc1100000 0x200000>;
 
+                       hhi: system-controller@4000 {
+                               compatible = "amlogic,meson-hhi-sysctrl",
+                                            "simple-mfd",
+                                            "syscon";
+                               reg = <0x4000 0x400>;
+                       };
+
                        assist: assist@7c00 {
                                compatible = "amlogic,meson-mx-assist", "syscon";
                                reg = <0x7c00 0x200>;
index 1ea5a36..66b1675 100644 (file)
 };
 
 &cbus {
-       clkc: clock-controller@4000 {
-               #clock-cells = <1>;
-               #reset-cells = <1>;
-               compatible = "amlogic,meson8-clkc";
-               reg = <0x8000 0x4>, <0x4000 0x400>;
-       };
-
        reset: reset-controller@4404 {
                compatible = "amlogic,meson8b-reset";
                reg = <0x4404 0x9c>;
        status = "okay";
 };
 
+&hhi {
+       clkc: clock-controller {
+               compatible = "amlogic,meson8-clkc";
+               #clock-cells = <1>;
+               #reset-cells = <1>;
+       };
+};
+
 &hwrng {
        compatible = "amlogic,meson8-rng", "amlogic,meson-rng";
        clocks = <&clkc CLKID_RNG0>;
index 9fca774..9faf70a 100644 (file)
 };
 
 &cbus {
-       clkc: clock-controller@4000 {
-               #clock-cells = <1>;
-               #reset-cells = <1>;
-               compatible = "amlogic,meson8b-clkc";
-               reg = <0x8000 0x4>, <0x4000 0x400>;
-       };
-
        reset: reset-controller@4404 {
                compatible = "amlogic,meson8b-reset";
                reg = <0x4404 0x9c>;
        status = "okay";
 };
 
+&hhi {
+       clkc: clock-controller {
+               compatible = "amlogic,meson8-clkc";
+               #clock-cells = <1>;
+               #reset-cells = <1>;
+       };
+};
+
 &hwrng {
        compatible = "amlogic,meson8b-rng", "amlogic,meson-rng";
        clocks = <&clkc CLKID_RNG0>;