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LoongArch: Check for AMO instructions in insns_not_supported()
authorTiezhu Yang <yangtiezhu@loongson.cn>
Thu, 29 Jun 2023 12:58:44 +0000 (20:58 +0800)
committerHuacai Chen <chenhuacai@loongson.cn>
Thu, 29 Jun 2023 12:58:44 +0000 (20:58 +0800)
Like llsc instructions, the atomic memory access instructions shouldn't
be supported for probing, so check for them in insns_not_supported().

Closes: https://lore.kernel.org/all/SY4P282MB351877A70A0333C790FE85A5C09C9@SY4P282MB3518.AUSP282.PROD.OUTLOOK.COM/
Tested-by: Jeff Xie <xiehuan09@gmail.com>
Reported-by: Hengqi Chen <hengqi.chen@gmail.com>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
arch/loongarch/include/asm/inst.h
arch/loongarch/kernel/inst.c

index 985760e..a8b88a0 100644 (file)
@@ -187,6 +187,32 @@ enum reg3_op {
        amord_op        = 0x70c7,
        amxorw_op       = 0x70c8,
        amxord_op       = 0x70c9,
+       ammaxw_op       = 0x70ca,
+       ammaxd_op       = 0x70cb,
+       amminw_op       = 0x70cc,
+       ammind_op       = 0x70cd,
+       ammaxwu_op      = 0x70ce,
+       ammaxdu_op      = 0x70cf,
+       amminwu_op      = 0x70d0,
+       ammindu_op      = 0x70d1,
+       amswapdbw_op    = 0x70d2,
+       amswapdbd_op    = 0x70d3,
+       amadddbw_op     = 0x70d4,
+       amadddbd_op     = 0x70d5,
+       amanddbw_op     = 0x70d6,
+       amanddbd_op     = 0x70d7,
+       amordbw_op      = 0x70d8,
+       amordbd_op      = 0x70d9,
+       amxordbw_op     = 0x70da,
+       amxordbd_op     = 0x70db,
+       ammaxdbw_op     = 0x70dc,
+       ammaxdbd_op     = 0x70dd,
+       ammindbw_op     = 0x70de,
+       ammindbd_op     = 0x70df,
+       ammaxdbwu_op    = 0x70e0,
+       ammaxdbdu_op    = 0x70e1,
+       ammindbwu_op    = 0x70e2,
+       ammindbdu_op    = 0x70e3,
        fldgts_op       = 0x70e8,
        fldgtd_op       = 0x70e9,
        fldles_op       = 0x70ea,
index 18e1975..a3169cf 100644 (file)
@@ -135,6 +135,12 @@ void simu_branch(struct pt_regs *regs, union loongarch_instruction insn)
 
 bool insns_not_supported(union loongarch_instruction insn)
 {
+       switch (insn.reg3_format.opcode) {
+       case amswapw_op ... ammindbdu_op:
+               pr_notice("atomic memory access instructions are not supported\n");
+               return true;
+       }
+
        switch (insn.reg2i14_format.opcode) {
        case llw_op:
        case lld_op: