arm64: dts: qcom: msm8996: correct #clock-cells for QMP PHY nodes

The commit 82d61e19fccb ("arm64: dts: qcom: msm8996: Move '#clock-cells'
to QMP PHY child node") moved the '#clock-cells' properties to the child
nodes. However it missed the fact that the property must have been set
to <0> (as all pipe clocks use of_clk_hw_simple_get as the xlate
function. Also the mentioned commit didn't add '#clock-cells' properties
to second and third PCIe PHY nodes. Correct both these mistakes:

- Set '#clock-cells' to <0>,
- Add the property to pciephy_1 and pciephy_2 nodes.

Fixes: 82d61e19fccb ("arm64: dts: qcom: msm8996: Move '#clock-cells' to QMP PHY child node")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220620071936.1558906-3-dmitry.baryshkov@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index b9a37e7..469a6bc 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -610,7 +610,7 @@
                                      <0x00035400 0x1dc>;
                                #phy-cells = <0>;
 
-                               #clock-cells = <1>;
+                               #clock-cells = <0>;
                                clock-output-names = "pcie_0_pipe_clk_src";
                                clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
                                clock-names = "pipe0";
@@ -624,6 +624,7 @@
                                      <0x00036400 0x1dc>;
                                #phy-cells = <0>;
 
+                               #clock-cells = <0>;
                                clock-output-names = "pcie_1_pipe_clk_src";
                                clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
                                clock-names = "pipe1";
@@ -637,6 +638,7 @@
                                      <0x00037400 0x1dc>;
                                #phy-cells = <0>;
 
+                               #clock-cells = <0>;
                                clock-output-names = "pcie_2_pipe_clk_src";
                                clocks = <&gcc GCC_PCIE_2_PIPE_CLK>;
                                clock-names = "pipe2";
@@ -2951,7 +2953,7 @@
                                      <0x07410600 0x1a8>;
                                #phy-cells = <0>;
 
-                               #clock-cells = <1>;
+                               #clock-cells = <0>;
                                clock-output-names = "usb3_phy_pipe_clk_src";
                                clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
                                clock-names = "pipe0";