// vector. The next one matches the intrinsic and could zero arbitrary elements
// in the target vector.
multiclass SS41I_insertf32<bits<8> opc, string asm, bit Is2Addr = 1,
- OpndItins itins = DEFAULT_ITINS> {
+ OpndItins itins = SSE_INSERT_ITINS> {
def rr : SS4AIi8<opc, MRMSrcReg, (outs VR128:$dst),
(ins VR128:$src1, VR128:$src2, u8imm:$src3),
!if(Is2Addr,
let ExeDomain = SSEPackedSingle in {
let Predicates = [UseAVX] in
- defm VINSERTPS : SS41I_insertf32<0x21, "vinsertps", 0>, VEX_4V, VEX_WIG;
+ defm VINSERTPS : SS41I_insertf32<0x21, "vinsertps", 0>,
+ VEX_4V, VEX_WIG;
let Constraints = "$src1 = $dst" in
- defm INSERTPS : SS41I_insertf32<0x21, "insertps", 1, SSE_INSERT_ITINS>;
+ defm INSERTPS : SS41I_insertf32<0x21, "insertps", 1>;
}
let Predicates = [UseAVX] in {