drm/i915/gvt: Remove disable_warn_untrack and print untracked mmio with debug level

The disable_warn_untrack never prevent gvt from printing untracked
mmio errors. We were disturbed by this error storm and the fix is
just adding them to the list with no essential new change.

This message is only useful for enabling new platform during
developing process. So lower the message level to debug and then
remove disable_warn_untrack.

Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
index 6ec8888..05d15a0 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -99,7 +99,6 @@ struct intel_vgpu_fence {
 struct intel_vgpu_mmio {
        void *vreg;
        void *sreg;
-       bool disable_warn_untrack;
 };
 
 #define INTEL_GVT_MAX_BAR_NUM 4

diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index a33c1c3..26c924b 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -191,6 +191,8 @@ static int sanitize_fence_mmio_access(struct intel_vgpu *vgpu,
        unsigned int max_fence = vgpu_fence_sz(vgpu);
 
        if (fence_num >= max_fence) {
+               gvt_vgpu_err("access oob fence reg %d/%d\n",
+                            fence_num, max_fence);
 
                /* When guest access oob fence regs without access
                 * pv_info first, we treat guest not supporting GVT,
@@ -200,11 +202,6 @@ static int sanitize_fence_mmio_access(struct intel_vgpu *vgpu,
                        enter_failsafe_mode(vgpu,
                                        GVT_FAILSAFE_UNSUPPORTED_GUEST);
 
-               if (!vgpu->mmio.disable_warn_untrack) {
-                       gvt_vgpu_err("found oob fence register access\n");
-                       gvt_vgpu_err("total fence %d, access fence %d\n",
-                                    max_fence, fence_num);
-               }
                memset(p_data, 0, bytes);
                return -EINVAL;
        }
@@ -3092,9 +3089,7 @@ int intel_vgpu_mmio_reg_rw(struct intel_vgpu *vgpu, unsigned int offset,
         */
        mmio_info = find_mmio_info(gvt, offset);
        if (!mmio_info) {
-               if (!vgpu->mmio.disable_warn_untrack)
-                       gvt_vgpu_err("untracked MMIO %08x len %d\n",
-                                    offset, bytes);
+               gvt_dbg_mmio("untracked MMIO %08x len %d\n", offset, bytes);
                goto default_rw;
        }
 

diff --git a/drivers/gpu/drm/i915/gvt/mmio.c b/drivers/gpu/drm/i915/gvt/mmio.c
index 11b71b3..e4960af 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/mmio.c
+++ b/drivers/gpu/drm/i915/gvt/mmio.c
@@ -244,8 +244,6 @@ void intel_vgpu_reset_mmio(struct intel_vgpu *vgpu, bool dmlr)
 
                /* set the bit 0:2(Core C-State ) to C0 */
                vgpu_vreg_t(vgpu, GEN6_GT_CORE_STATUS) = 0;
-
-               vgpu->mmio.disable_warn_untrack = false;
        } else {
 #define GVT_GEN8_MMIO_RESET_OFFSET             (0x44200)
                /* only reset the engine related, so starting with 0x44200