scsi: mpt3sas: Don't change the DMA coherent mask after allocations

The DMA layer does not allow changing the DMA coherent mask after there are
outstanding allocations.

Link: https://lore.kernel.org/r/1587626596-1044-2-git-send-email-suganath-prabu.subramani@broadcom.com
Reported-by: Abdul Haleem <abdhalee@linux.vnet.ibm.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Suganath Prabu <suganath-prabu.subramani@broadcom.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c
index 920a3a2..58d607b 100644 (file)
--- a/drivers/scsi/mpt3sas/mpt3sas_base.c
+++ b/drivers/scsi/mpt3sas/mpt3sas_base.c
@@ -2806,58 +2806,38 @@ _base_build_sg_ieee(struct MPT3SAS_ADAPTER *ioc, void *psge,
 static int
 _base_config_dma_addressing(struct MPT3SAS_ADAPTER *ioc, struct pci_dev *pdev)
 {
-       u64 required_mask, coherent_mask;
        struct sysinfo s;
-       /* Set 63 bit DMA mask for all SAS3 and SAS35 controllers */
-       int dma_mask = (ioc->hba_mpi_version_belonged > MPI2_VERSION) ? 63 : 64;
-
-       if (ioc->is_mcpu_endpoint)
-               goto try_32bit;
+       int dma_mask;
 
-       required_mask = dma_get_required_mask(&pdev->dev);
-       if (sizeof(dma_addr_t) == 4 || required_mask == 32)
-               goto try_32bit;
-
-       if (ioc->dma_mask)
-               coherent_mask = DMA_BIT_MASK(dma_mask);
+       if (ioc->is_mcpu_endpoint ||
+           sizeof(dma_addr_t) == 4 ||
+           dma_get_required_mask(&pdev->dev) <= 32)
+               dma_mask = 32;
+       /* Set 63 bit DMA mask for all SAS3 and SAS35 controllers */
+       else if (ioc->hba_mpi_version_belonged > MPI2_VERSION)
+               dma_mask = 63;
        else
-               coherent_mask = DMA_BIT_MASK(32);
+               dma_mask = 64;
 
        if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(dma_mask)) ||
-           dma_set_coherent_mask(&pdev->dev, coherent_mask))
-               goto try_32bit;
-
-       ioc->base_add_sg_single = &_base_add_sg_single_64;
-       ioc->sge_size = sizeof(Mpi2SGESimple64_t);
-       ioc->dma_mask = dma_mask;
-       goto out;
-
- try_32bit:
-       if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))
+           dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(dma_mask)))
                return -ENODEV;
 
-       ioc->base_add_sg_single = &_base_add_sg_single_32;
-       ioc->sge_size = sizeof(Mpi2SGESimple32_t);
-       ioc->dma_mask = 32;
- out:
+       if (dma_mask > 32) {
+               ioc->base_add_sg_single = &_base_add_sg_single_64;
+               ioc->sge_size = sizeof(Mpi2SGESimple64_t);
+       } else {
+               ioc->base_add_sg_single = &_base_add_sg_single_32;
+               ioc->sge_size = sizeof(Mpi2SGESimple32_t);
+       }
+
        si_meminfo(&s);
        ioc_info(ioc, "%d BIT PCI BUS DMA ADDRESSING SUPPORTED, total mem (%ld kB)\n",
-                ioc->dma_mask, convert_to_kb(s.totalram));
+               dma_mask, convert_to_kb(s.totalram));
 
        return 0;
 }
 
-static int
-_base_change_consistent_dma_mask(struct MPT3SAS_ADAPTER *ioc,
-                                     struct pci_dev *pdev)
-{
-       if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(ioc->dma_mask))) {
-               if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
-                       return -ENODEV;
-       }
-       return 0;
-}
-
 /**
  * _base_check_enable_msix - checks MSIX capabable.
  * @ioc: per adapter object
@@ -5169,14 +5149,6 @@ _base_allocate_memory_pools(struct MPT3SAS_ADAPTER *ioc)
                total_sz += sz;
        } while (ioc->rdpq_array_enable && (++i < ioc->reply_queue_count));
 
-       if (ioc->dma_mask > 32) {
-               if (_base_change_consistent_dma_mask(ioc, ioc->pdev) != 0) {
-                       ioc_warn(ioc, "no suitable consistent DMA mask for %s\n",
-                                pci_name(ioc->pdev));
-                       goto out;
-               }
-       }
-
        ioc->scsiio_depth = ioc->hba_queue_depth -
            ioc->hi_priority_depth - ioc->internal_depth;
 
@@ -7158,7 +7130,6 @@ mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc)
        ioc->smp_affinity_enable = smp_affinity_enable;
 
        ioc->rdpq_array_enable_assigned = 0;
-       ioc->dma_mask = 0;
        if (ioc->is_aero_ioc)
                ioc->base_readl = &_base_readl_aero;
        else

diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.h b/drivers/scsi/mpt3sas/mpt3sas_base.h
index e719715..caae040 100644 (file)
--- a/drivers/scsi/mpt3sas/mpt3sas_base.h
+++ b/drivers/scsi/mpt3sas/mpt3sas_base.h
@@ -1026,7 +1026,6 @@ typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
  * @ir_firmware: IR firmware present
  * @bars: bitmask of BAR's that must be configured
  * @mask_interrupts: ignore interrupt
- * @dma_mask: used to set the consistent dma mask
  * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and
  *                     pci resource handling
  * @fault_reset_work_q_name: fw fault work queue
@@ -1205,7 +1204,6 @@ struct MPT3SAS_ADAPTER {
        u8              ir_firmware;
        int             bars;
        u8              mask_interrupts;
-       int             dma_mask;
 
        /* fw fault handler */
        char            fault_reset_work_q_name[20];