Fix 32-bit variable shift wrapping in dr_ste_v0_get_miss_addr.
Fixes:
6b93b400aa88 ("net/mlx5: DR, Move STEv0 setters and getters")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
static u64 dr_ste_v0_get_miss_addr(u8 *hw_ste_p)
{
u64 index =
- (MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_31_6) |
- MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_39_32) << 26);
+ ((u64)MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_31_6) |
+ ((u64)MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_39_32)) << 26);
return index << 6;
}