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drm/amdgpu/gmc: move invaliation bitmap setup to common code
authorAlex Deucher <alexander.deucher@amd.com>
Mon, 6 Jan 2020 18:14:27 +0000 (13:14 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 7 Jan 2020 17:03:42 +0000 (12:03 -0500)
So it can be shared with newer GMC versions.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h

index bbcd11a..d6901b2 100644 (file)
@@ -333,3 +333,43 @@ void amdgpu_gmc_ras_fini(struct amdgpu_device *adev)
        amdgpu_mmhub_ras_fini(adev);
        amdgpu_xgmi_ras_fini(adev);
 }
+
+       /*
+        * The latest engine allocation on gfx9 is:
+        * Engine 2, 3: firmware
+        * Engine 0, 1, 4~16: amdgpu ring,
+        *                    subject to change when ring number changes
+        * Engine 17: Gart flushes
+        */
+#define GFXHUB_FREE_VM_INV_ENGS_BITMAP         0x1FFF3
+#define MMHUB_FREE_VM_INV_ENGS_BITMAP          0x1FFF3
+
+int amdgpu_gmc_allocate_vm_inv_eng(struct amdgpu_device *adev)
+{
+       struct amdgpu_ring *ring;
+       unsigned vm_inv_engs[AMDGPU_MAX_VMHUBS] =
+               {GFXHUB_FREE_VM_INV_ENGS_BITMAP, MMHUB_FREE_VM_INV_ENGS_BITMAP,
+               GFXHUB_FREE_VM_INV_ENGS_BITMAP};
+       unsigned i;
+       unsigned vmhub, inv_eng;
+
+       for (i = 0; i < adev->num_rings; ++i) {
+               ring = adev->rings[i];
+               vmhub = ring->funcs->vmhub;
+
+               inv_eng = ffs(vm_inv_engs[vmhub]);
+               if (!inv_eng) {
+                       dev_err(adev->dev, "no VM inv eng for ring %s\n",
+                               ring->name);
+                       return -EINVAL;
+               }
+
+               ring->vm_inv_eng = inv_eng - 1;
+               vm_inv_engs[vmhub] &= ~(1 << ring->vm_inv_eng);
+
+               dev_info(adev->dev, "ring %s uses VM inv eng %u on hub %u\n",
+                        ring->name, ring->vm_inv_eng, ring->funcs->vmhub);
+       }
+
+       return 0;
+}
index b499a3d..c91dd60 100644 (file)
@@ -267,5 +267,6 @@ bool amdgpu_gmc_filter_faults(struct amdgpu_device *adev, uint64_t addr,
                              uint16_t pasid, uint64_t timestamp);
 int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev);
 void amdgpu_gmc_ras_fini(struct amdgpu_device *adev);
+int amdgpu_gmc_allocate_vm_inv_eng(struct amdgpu_device *adev);
 
 #endif
index e91e260..26194ac 100644 (file)
@@ -797,36 +797,6 @@ static bool gmc_v9_0_keep_stolen_memory(struct amdgpu_device *adev)
        }
 }
 
-static int gmc_v9_0_allocate_vm_inv_eng(struct amdgpu_device *adev)
-{
-       struct amdgpu_ring *ring;
-       unsigned vm_inv_engs[AMDGPU_MAX_VMHUBS] =
-               {GFXHUB_FREE_VM_INV_ENGS_BITMAP, MMHUB_FREE_VM_INV_ENGS_BITMAP,
-               GFXHUB_FREE_VM_INV_ENGS_BITMAP};
-       unsigned i;
-       unsigned vmhub, inv_eng;
-
-       for (i = 0; i < adev->num_rings; ++i) {
-               ring = adev->rings[i];
-               vmhub = ring->funcs->vmhub;
-
-               inv_eng = ffs(vm_inv_engs[vmhub]);
-               if (!inv_eng) {
-                       dev_err(adev->dev, "no VM inv eng for ring %s\n",
-                               ring->name);
-                       return -EINVAL;
-               }
-
-               ring->vm_inv_eng = inv_eng - 1;
-               vm_inv_engs[vmhub] &= ~(1 << ring->vm_inv_eng);
-
-               dev_info(adev->dev, "ring %s uses VM inv eng %u on hub %u\n",
-                        ring->name, ring->vm_inv_eng, ring->funcs->vmhub);
-       }
-
-       return 0;
-}
-
 static int gmc_v9_0_late_init(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -835,7 +805,7 @@ static int gmc_v9_0_late_init(void *handle)
        if (!gmc_v9_0_keep_stolen_memory(adev))
                amdgpu_bo_late_init(adev);
 
-       r = gmc_v9_0_allocate_vm_inv_eng(adev);
+       r = amdgpu_gmc_allocate_vm_inv_eng(adev);
        if (r)
                return r;
        /* Check if ecc is available */
index 49e8be7..e0585e8 100644 (file)
 #ifndef __GMC_V9_0_H__
 #define __GMC_V9_0_H__
 
-       /*
-        * The latest engine allocation on gfx9 is:
-        * Engine 2, 3: firmware
-        * Engine 0, 1, 4~16: amdgpu ring,
-        *                    subject to change when ring number changes
-        * Engine 17: Gart flushes
-        */
-#define GFXHUB_FREE_VM_INV_ENGS_BITMAP         0x1FFF3
-#define MMHUB_FREE_VM_INV_ENGS_BITMAP          0x1FFF3
-
 extern const struct amd_ip_funcs gmc_v9_0_ip_funcs;
 extern const struct amdgpu_ip_block_version gmc_v9_0_ip_block;
 #endif