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Rely on instruction format to determine so_reg operand for now.
author
Evan Cheng
<evan.cheng@apple.com>
Sat, 13 Sep 2008 01:38:29 +0000
(
01:38
+0000)
committer
Evan Cheng
<evan.cheng@apple.com>
Sat, 13 Sep 2008 01:38:29 +0000
(
01:38
+0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56181
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/ARM/ARMCodeEmitter.cpp
patch
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diff --git
a/lib/Target/ARM/ARMCodeEmitter.cpp
b/lib/Target/ARM/ARMCodeEmitter.cpp
index
7abb7d2
..
1484d16
100644
(file)
--- a/
lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/
lib/Target/ARM/ARMCodeEmitter.cpp
@@
-372,7
+372,11
@@
unsigned ARMCodeEmitter::getAddrMode1InstrBinary(const MachineInstr &MI,
}
// Encode shifter operand.
- if (TID.getNumOperands() - OpIdx > 1)
+ bool HasSoReg = (Format == ARMII::DPRdSoReg ||
+ Format == ARMII::DPRnSoReg ||
+ Format == ARMII::DPRSoReg ||
+ Format == ARMII::DPRSoRegS);
+ if (HasSoReg)
// Encode SoReg.
return Binary | getMachineSoRegOpValue(MI, TID, OpIdx);