OSDN Git Service

staging:rtl8192u: Rename EEPROM_TxPwIndex_CCK_V1 - Style
authorJohn Whitmore <johnfwhitmore@gmail.com>
Sun, 26 Aug 2018 21:14:32 +0000 (22:14 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 27 Aug 2018 17:27:48 +0000 (19:27 +0200)
Rename the constant EEPROM_TxPwIndex_CCK_V1 to
EEPROM_TX_PW_INDEX_CCK_V1, this clears the checkpatch issue with
CamelCase naming.

This is purely a coding style change which should have no impact
on runtime code execution.

Signed-off-by: John Whitmore <johnfwhitmore@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/rtl8192u/r8192U_core.c
drivers/staging/rtl8192u/r8192U_hw.h

index a59e353..593e9cb 100644 (file)
@@ -2498,7 +2498,7 @@ static int rtl8192_read_eeprom_info(struct net_device *dev)
                        }
                } else if (priv->EEPROM_Def_Ver == 1) {
                        if (bLoad_From_EEPOM) {
-                               ret = eprom_read(dev, EEPROM_TxPwIndex_CCK_V1 >> 1);
+                               ret = eprom_read(dev, EEPROM_TX_PW_INDEX_CCK_V1 >> 1);
                                if (ret < 0)
                                        return ret;
                                tmpValue = ((u16)ret & 0xff00) >> 8;
@@ -2508,7 +2508,7 @@ static int rtl8192_read_eeprom_info(struct net_device *dev)
                        priv->EEPROMTxPowerLevelCCK_V1[0] = (u8)tmpValue;
 
                        if (bLoad_From_EEPOM) {
-                               ret = eprom_read(dev, (EEPROM_TxPwIndex_CCK_V1 + 2) >> 1);
+                               ret = eprom_read(dev, (EEPROM_TX_PW_INDEX_CCK_V1 + 2) >> 1);
                                if (ret < 0)
                                        return ret;
                                tmpValue = (u16)ret;
index a7d1a7f..d7f830b 100644 (file)
@@ -44,7 +44,7 @@
 
 #define EEPROM_TX_PW_INDEX_CCK 0x23    //0x23
 #define EEPROM_TX_PW_INDEX_OFDM_24G    0x24    //0x24~0x26
-#define EEPROM_TxPwIndex_CCK_V1                0x29    //0x29~0x2B
+#define EEPROM_TX_PW_INDEX_CCK_V1      0x29    //0x29~0x2B
 #define EEPROM_TX_PW_INDEX_OFDM_24G_V1 0x2C    //0x2C~0x2E
 #define EEPROM_TxPwIndex_Ver           0x27    //0x27