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drm/amd/powerplay: fix PSI not enabled by kmd
authorRex Zhu <Rex.Zhu@amd.com>
Wed, 2 Aug 2017 11:27:04 +0000 (19:27 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Aug 2017 18:46:10 +0000 (14:46 -0400)
cherry-pick from windows driver.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

index cd33eb1..c062844 100644 (file)
@@ -142,7 +142,7 @@ int pp_atomfwctrl_get_voltage_table_v4(struct pp_hwmgr *hwmgr,
                }
        } else if (voltage_mode == VOLTAGE_OBJ_SVID2) {
                voltage_table->psi1_enable =
-                       voltage_object->svid2_voltage_obj.loadline_psi1 & 0x1;
+                       (voltage_object->svid2_voltage_obj.loadline_psi1 & 0x20) >> 5;
                voltage_table->psi0_enable =
                        voltage_object->svid2_voltage_obj.psi0_enable & 0x1;
                voltage_table->max_vid_step =
index 979cc5c..4aa0a76 100644 (file)
@@ -2522,6 +2522,9 @@ static int vega10_init_smc_table(struct pp_hwmgr *hwmgr)
        pp_table->DisplayDpmVoltageMode =
                        (uint8_t)(table_info->uc_dcef_dpm_voltage_mode);
 
+       data->vddc_voltage_table.psi0_enable = voltage_table.psi0_enable;
+       data->vddc_voltage_table.psi1_enable = voltage_table.psi1_enable;
+
        if (data->registry_data.ulv_support &&
                        table_info->us_ulv_voltage_offset) {
                result = vega10_populate_ulv_state(hwmgr);