Add a complete new state handling for SI.
v2: fix spelling error
Signed-off-by: Christian König <deathsimple@vodafone.de>
evergreen_hw_context.c \
evergreen_state.c \
r600_translate.c \
- r600_state_common.c
+ r600_state_common.c \
+ radeonsi_pm4.c \
+ si_state.c
* Jerome Glisse
*/
#include "r600_hw_context_priv.h"
+#include "radeonsi_pm4.h"
#include "radeonsi_pipe.h"
#include "sid.h"
#include "util/u_memory.h"
ctx->pm4_dirty_cdwords += enable_block->pm4_ndwords;
enable_block->nreg_dirty = enable_block->nreg;
}
+ si_pm4_reset_emitted(ctx);
}
void r600_context_emit_fence(struct r600_context *ctx, struct r600_resource *fence_bo, unsigned offset, unsigned value)
rdraw.db_render_control = dsa->db_render_control;
/* Emit states. */
+ rctx->pm4_dirty_cdwords += si_pm4_dirty_dw(rctx);
+
r600_need_cs_space(rctx, 0, TRUE);
LIST_FOR_EACH_ENTRY_SAFE(state, next_state, &rctx->dirty_states, head) {
LIST_FOR_EACH_ENTRY_SAFE(dirty_block, next_block, &rctx->dirty,list) {
r600_context_block_emit_dirty(rctx, dirty_block);
}
+ si_pm4_emit_dirty(rctx);
rctx->pm4_dirty_cdwords = 0;
/* Enable stream out if needed. */
#include "util/u_slab.h"
#include "r600.h"
#include "radeonsi_public.h"
+#include "radeonsi_pm4.h"
+#include "si_state.h"
#include "r600_resource.h"
#include "sid.h"
struct pipe_index_buffer index_buffer;
struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
unsigned nr_vertex_buffers;
+
+ /* SI state handling */
+ union si_state queued;
+ union si_state emitted;
};
static INLINE void r600_emit_atom(struct r600_context *rctx, struct r600_atom *atom)
--- /dev/null
+/*
+ * Copyright 2012 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * on the rights to use, copy, modify, merge, publish, distribute, sub
+ * license, and/or sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Christian König <christian.koenig@amd.com>
+ */
+
+#include "util/u_memory.h"
+#include "radeonsi_pipe.h"
+#include "radeonsi_pm4.h"
+#include "sid.h"
+#include "r600_hw_context_priv.h"
+
+#define NUMBER_OF_STATES (sizeof(union si_state) / sizeof(struct si_pm4_state *))
+
+void si_pm4_set_reg(struct si_pm4_state *state, unsigned reg, uint32_t val)
+{
+ unsigned opcode, count;
+
+ if (reg >= SI_CONFIG_REG_OFFSET && reg <= SI_CONFIG_REG_END) {
+ opcode = PKT3_SET_CONFIG_REG;
+ reg -= SI_CONFIG_REG_OFFSET;
+
+ } else if (reg >= SI_SH_REG_OFFSET && reg <= SI_SH_REG_END) {
+ opcode = PKT3_SET_SH_REG;
+ reg -= SI_SH_REG_OFFSET;
+
+ } else if (reg >= SI_CONTEXT_REG_OFFSET && reg <= SI_CONTEXT_REG_END) {
+ opcode = PKT3_SET_CONTEXT_REG;
+ reg -= SI_CONTEXT_REG_OFFSET;
+ } else {
+ R600_ERR("Invalid register offset %08x!\n", reg);
+ return;
+ }
+
+ reg >>= 2;
+
+ if (opcode != state->last_opcode || reg != (state->last_reg + 1)) {
+ state->last_opcode = opcode;
+ state->last_pm4 = state->ndw++;
+ state->pm4[state->ndw++] = reg;
+ }
+
+ state->last_reg = reg;
+ count = state->ndw - state->last_pm4 - 1;
+ state->pm4[state->last_pm4] = PKT3(opcode, count, 0);
+ state->pm4[state->ndw++] = val;
+
+ assert(state->ndw <= SI_PM4_MAX_DW);
+}
+
+void si_pm4_add_bo(struct si_pm4_state *state,
+ struct r600_resource *bo,
+ enum radeon_bo_usage usage)
+{
+ unsigned idx = state->nbo++;
+ assert(idx < SI_PM4_MAX_BO);
+
+ pipe_resource_reference((struct pipe_resource**)&state->bo[idx],
+ (struct pipe_resource*)bo);
+ state->bo_usage[idx] = usage;
+}
+
+void si_pm4_inval_shader_cache(struct si_pm4_state *state)
+{
+ state->cp_coher_cntl |= S_0085F0_SH_ICACHE_ACTION_ENA(1);
+ state->cp_coher_cntl |= S_0085F0_SH_KCACHE_ACTION_ENA(1);
+}
+
+void si_pm4_inval_texture_cache(struct si_pm4_state *state)
+{
+ state->cp_coher_cntl |= S_0085F0_TC_ACTION_ENA(1);
+}
+
+void si_pm4_inval_vertex_cache(struct si_pm4_state *state)
+{
+ /* Some GPUs don't have the vertex cache and must use the texture cache instead. */
+ state->cp_coher_cntl |= S_0085F0_TC_ACTION_ENA(1);
+}
+
+void si_pm4_inval_fb_cache(struct si_pm4_state *state, unsigned nr_cbufs)
+{
+ state->cp_coher_cntl |= S_0085F0_CB_ACTION_ENA(1);
+ state->cp_coher_cntl |= ((1 << nr_cbufs) - 1) << S_0085F0_CB0_DEST_BASE_ENA_SHIFT;
+}
+
+void si_pm4_inval_zsbuf_cache(struct si_pm4_state *state)
+{
+ state->cp_coher_cntl |= S_0085F0_DB_ACTION_ENA(1) | S_0085F0_DB_DEST_BASE_ENA(1);
+}
+
+void si_pm4_free_state(struct r600_context *rctx,
+ struct si_pm4_state *state,
+ unsigned idx)
+{
+ if (state == NULL)
+ return;
+
+ if (rctx->emitted.array[idx] == state) {
+ rctx->emitted.array[idx] = NULL;
+ }
+
+ for (int i = 0; i < state->nbo; ++i) {
+ pipe_resource_reference((struct pipe_resource**)&state->bo[idx],
+ NULL);
+ }
+ FREE(state);
+}
+
+unsigned si_pm4_dirty_dw(struct r600_context *rctx)
+{
+ unsigned count = 0;
+ uint32_t cp_coher_cntl = 0;
+
+ for (int i = 0; i < NUMBER_OF_STATES; ++i) {
+ struct si_pm4_state *state = rctx->queued.array[i];
+
+ if (!state || rctx->emitted.array[i] == state)
+ continue;
+
+ count += state->ndw;
+ cp_coher_cntl |= state->cp_coher_cntl;
+ }
+
+ //TODO
+ rctx->atom_surface_sync.flush_flags |= cp_coher_cntl;
+ r600_atom_dirty(rctx, &rctx->atom_surface_sync.atom);
+ return count;
+}
+
+void si_pm4_emit_dirty(struct r600_context *rctx)
+{
+ struct radeon_winsys_cs *cs = rctx->cs;
+
+ for (int i = 0; i < NUMBER_OF_STATES; ++i) {
+ struct si_pm4_state *state = rctx->queued.array[i];
+
+ if (!state || rctx->emitted.array[i] == state)
+ continue;
+
+ for (int j = 0; j < state->nbo; ++j) {
+ r600_context_bo_reloc(rctx, state->bo[j],
+ state->bo_usage[j]);
+ }
+
+ memcpy(&cs->buf[cs->cdw], state->pm4, state->ndw * 4);
+ cs->cdw += state->ndw;
+
+ rctx->emitted.array[i] = state;
+ }
+}
+
+void si_pm4_reset_emitted(struct r600_context *rctx)
+{
+ memset(&rctx->emitted, 0, sizeof(rctx->emitted));
+}
--- /dev/null
+/*
+ * Copyright 2012 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * on the rights to use, copy, modify, merge, publish, distribute, sub
+ * license, and/or sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Christian König <christian.koenig@amd.com>
+ */
+
+#ifndef RADEONSI_PM4_H
+#define RADEONSI_PM4_H
+
+#include "../../winsys/radeon/drm/radeon_winsys.h"
+
+#define SI_PM4_MAX_DW 128
+#define SI_PM4_MAX_BO 32
+
+// forward defines
+struct r600_context;
+
+struct si_pm4_state
+{
+ /* PKT3_SET_*_REG handling */
+ unsigned last_opcode;
+ unsigned last_reg;
+ unsigned last_pm4;
+
+ /* flush flags for SURFACE_SYNC */
+ uint32_t cp_coher_cntl;
+
+ /* commands for the DE */
+ unsigned ndw;
+ uint32_t pm4[SI_PM4_MAX_DW];
+
+ /* BO's referenced by this state */
+ unsigned nbo;
+ struct r600_resource *bo[SI_PM4_MAX_BO];
+ enum radeon_bo_usage bo_usage[SI_PM4_MAX_BO];
+};
+
+void si_pm4_set_reg(struct si_pm4_state *state, unsigned reg, uint32_t val);
+void si_pm4_add_bo(struct si_pm4_state *state,
+ struct r600_resource *bo,
+ enum radeon_bo_usage usage);
+
+void si_pm4_inval_shader_cache(struct si_pm4_state *state);
+void si_pm4_inval_texture_cache(struct si_pm4_state *state);
+void si_pm4_inval_vertex_cache(struct si_pm4_state *state);
+void si_pm4_inval_fb_cache(struct si_pm4_state *state, unsigned nr_cbufs);
+void si_pm4_inval_zsbuf_cache(struct si_pm4_state *state);
+
+void si_pm4_free_state(struct r600_context *rctx,
+ struct si_pm4_state *state,
+ unsigned idx);
+unsigned si_pm4_dirty_dw(struct r600_context *rctx);
+void si_pm4_emit_dirty(struct r600_context *rctx);
+void si_pm4_reset_emitted(struct r600_context *rctx);
+
+#endif
--- /dev/null
+/*
+ * Copyright 2012 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * on the rights to use, copy, modify, merge, publish, distribute, sub
+ * license, and/or sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Christian König <christian.koenig@amd.com>
+ *
+ */
+
+#include "si_state.h"
--- /dev/null
+/*
+ * Copyright 2012 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * on the rights to use, copy, modify, merge, publish, distribute, sub
+ * license, and/or sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Christian König <christian.koenig@amd.com>
+ */
+
+#ifndef SI_STATE_H
+#define SI_STATE_H
+
+#include "radeonsi_pm4.h"
+
+union si_state {
+ struct {
+ } named;
+ struct si_pm4_state *array[0];
+};
+
+#define si_pm4_block_idx(member) \
+ (offsetof(union si_state, named.member) / sizeof(struct si_pm4_state *))
+
+#define si_pm4_bind_state(rctx, member, value) \
+ do { \
+ (rctx)->queued.named.member = (value); \
+ } while(0);
+
+#define si_pm4_delete_state(rctx, member, value) \
+ do { \
+ if ((rctx)->queued.named.member == (value)) { \
+ (rctx)->queued.named.member = NULL; \
+ } \
+ si_pm4_free_state(rctx, (struct si_pm4_state *)(value), \
+ si_pm4_block_idx(member)); \
+ } while(0);
+
+#define si_pm4_set_state(rctx, member, value) \
+ do { \
+ if ((rctx)->queued.named.member != (value)) { \
+ si_pm4_free_state(rctx, \
+ (struct si_pm4_state *)(rctx)->queued.named.member, \
+ si_pm4_block_idx(member)); \
+ (rctx)->queued.named.member = (value); \
+ } \
+ } while(0);
+
+#endif
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