#define SDHC_CAPAB_REG_DEFAULT 0x057834b4
#define DEFINE_SDHCI_COMMON_PROPERTIES(_state) \
+ DEFINE_PROP_UINT8("endianness", _state, endianness, DEVICE_LITTLE_ENDIAN), \
DEFINE_PROP_UINT8("sd-spec-version", _state, sd_spec_version, 2), \
DEFINE_PROP_UINT8("uhs", _state, uhs_mode, UHS_NOT_SUPPORTED), \
DEFINE_PROP_UINT8("vendor", _state, vendor, SDHCI_VENDOR_NONE), \
value >> shift, value >> shift);
}
-static const MemoryRegionOps sdhci_mmio_ops = {
+static const MemoryRegionOps sdhci_mmio_le_ops = {
.read = sdhci_read,
.write = sdhci_write,
.valid = {
.endianness = DEVICE_LITTLE_ENDIAN,
};
+static const MemoryRegionOps sdhci_mmio_be_ops = {
+ .read = sdhci_read,
+ .write = sdhci_write,
+ .impl = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+ .valid = {
+ .min_access_size = 1,
+ .max_access_size = 4,
+ .unaligned = false
+ },
+ .endianness = DEVICE_BIG_ENDIAN,
+};
+
static void sdhci_init_readonly_registers(SDHCIState *s, Error **errp)
{
ERRP_GUARD();
s->insert_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sdhci_raise_insertion_irq, s);
s->transfer_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sdhci_data_transfer, s);
-
- s->io_ops = &sdhci_mmio_ops;
}
void sdhci_uninitfn(SDHCIState *s)
{
ERRP_GUARD();
+ switch (s->endianness) {
+ case DEVICE_LITTLE_ENDIAN:
+ s->io_ops = &sdhci_mmio_le_ops;
+ break;
+ case DEVICE_BIG_ENDIAN:
+ s->io_ops = &sdhci_mmio_be_ops;
+ break;
+ default:
+ error_setg(errp, "Incorrect endianness");
+ return;
+ }
+
sdhci_init_readonly_registers(s, errp);
if (*errp) {
return;
}
+
s->buf_maxsz = sdhci_get_fifolen(s);
s->fifo_buffer = g_malloc0(s->buf_maxsz);