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drm/amd/powerplay: implement a common set dpm table API for smu V11
authorEvan Quan <evan.quan@amd.com>
Fri, 10 Jul 2020 02:46:48 +0000 (10:46 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 15 Jul 2020 16:42:14 +0000 (12:42 -0400)
Maximum the code sharing around smu V11.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
drivers/gpu/drm/amd/powerplay/smu_v11_0.c

index c6832be..b550cc8 100644 (file)
@@ -287,6 +287,10 @@ int smu_v11_0_get_dpm_level_count(struct smu_context *smu,
                                  enum smu_clk_type clk_type,
                                  uint32_t *value);
 
+int smu_v11_0_set_single_dpm_table(struct smu_context *smu,
+                                  enum smu_clk_type clk_type,
+                                  struct smu_11_0_dpm_table *single_dpm_table);
+
 int smu_v11_0_get_dpm_level_range(struct smu_context *smu,
                                  enum smu_clk_type clk_type,
                                  uint32_t *min_value,
index 6b492a4..5ba69cf 100644 (file)
@@ -1970,6 +1970,44 @@ int smu_v11_0_get_dpm_level_count(struct smu_context *smu,
                                               value);
 }
 
+int smu_v11_0_set_single_dpm_table(struct smu_context *smu,
+                                  enum smu_clk_type clk_type,
+                                  struct smu_11_0_dpm_table *single_dpm_table)
+{
+       int ret = 0;
+       uint32_t clk;
+       int i;
+
+       ret = smu_v11_0_get_dpm_level_count(smu,
+                                           clk_type,
+                                           &single_dpm_table->count);
+       if (ret) {
+               dev_err(smu->adev->dev, "[%s] failed to get dpm levels!\n", __func__);
+               return ret;
+       }
+
+       for (i = 0; i < single_dpm_table->count; i++) {
+               ret = smu_v11_0_get_dpm_freq_by_index(smu,
+                                                     clk_type,
+                                                     i,
+                                                     &clk);
+               if (ret) {
+                       dev_err(smu->adev->dev, "[%s] failed to get dpm freq by index!\n", __func__);
+                       return ret;
+               }
+
+               single_dpm_table->dpm_levels[i].value = clk;
+               single_dpm_table->dpm_levels[i].enabled = true;
+
+               if (i == 0)
+                       single_dpm_table->min = clk;
+               else if (i == single_dpm_table->count - 1)
+                       single_dpm_table->max = clk;
+       }
+
+       return 0;
+}
+
 int smu_v11_0_get_dpm_level_range(struct smu_context *smu,
                                  enum smu_clk_type clk_type,
                                  uint32_t *min_value,