clk: renesas: r8a7796: Add Audio-DMAC clocks

This patch adds A-DMAC{0,1} clocks for R8A7796 SoC.

Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
[geert: Correct parent clocks, preserve sort order]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index c6c5026..694701f 100644 (file)
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -138,6 +138,8 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
        DEF_MOD("sdif0",                 314,   R8A7796_CLK_SD0),
        DEF_MOD("rwdt",                  402,   R8A7796_CLK_R),
        DEF_MOD("intc-ap",               408,   R8A7796_CLK_S3D1),
+       DEF_MOD("audmac1",               501,   R8A7796_CLK_S0D3),
+       DEF_MOD("audmac0",               502,   R8A7796_CLK_S0D3),
        DEF_MOD("drif7",                 508,   R8A7796_CLK_S3D2),
        DEF_MOD("drif6",                 509,   R8A7796_CLK_S3D2),
        DEF_MOD("drif5",                 510,   R8A7796_CLK_S3D2),