}
; Subtraction also provides a zero-based CC value.
-define float @f5(float %a, float %b, float *%dest) {
+define float @f5(float %a, float %b, float *%dest) #0 {
; CHECK-LABEL: f5:
; CHECK: seb %f0, 0(%r2)
; CHECK-NEXT: bnher %r14
; CHECK-NEXT: bhr %r14
; CHECK: br %r14
entry:
- %res = call float @llvm.fabs.f32(float %a)
+ %res = call float @llvm.fabs.f32(float %a) #0
%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
float %res, float 0.0,
metadata !"ogt",
; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
- %abs = call float @llvm.fabs.f32(float %a)
+ %abs = call float @llvm.fabs.f32(float %a) #0
%res = fneg float %abs
%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
float %res, float 0.0,
; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
- %ret = call float asm "blah $1", "=f,{f0}"(float %val)
+ %ret = call float asm "blah $1", "=f,{f0}"(float %val) #0
%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
float %val, float 0.0,
metadata !"olt",
br i1 %cmp, label %exit, label %store
store:
- call void asm sideeffect "blah", ""()
+ call void asm sideeffect "blah", ""() #0
br label %exit
exit:
; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
- %ret = call double asm "blah $1", "=f,{f0}"(double %val)
+ %ret = call double asm "blah $1", "=f,{f0}"(double %val) #0
%cmp = call i1 @llvm.experimental.constrained.fcmp.f64(
double %val, double 0.0,
metadata !"olt",
br i1 %cmp, label %exit, label %store
store:
- call void asm sideeffect "blah", ""()
+ call void asm sideeffect "blah", ""() #0
br label %exit
exit:
br i1 %cmp, label %exit, label %store
store:
- call void asm sideeffect "blah", ""()
+ call void asm sideeffect "blah", ""() #0
br label %exit
exit:
; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
- %ret = call float asm "blah $1", "=f,{f2}"(float %val)
+ %ret = call float asm "blah $1", "=f,{f2}"(float %val) #0
%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
float %val, float 0.0,
metadata !"olt",
br i1 %cmp, label %exit, label %store
store:
- call void asm sideeffect "blah", ""()
+ call void asm sideeffect "blah", ""() #0
br label %exit
exit:
; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
- %ret = call double asm "blah $1", "=f,{f2}"(double %val)
+ %ret = call double asm "blah $1", "=f,{f2}"(double %val) #0
%cmp = call i1 @llvm.experimental.constrained.fcmp.f64(
double %val, double 0.0,
metadata !"olt",
br i1 %cmp, label %exit, label %store
store:
- call void asm sideeffect "blah", ""()
+ call void asm sideeffect "blah", ""() #0
br label %exit
exit:
float %a, float %b,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
- call void asm sideeffect "blah", ""()
+ call void asm sideeffect "blah", ""() #0
%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
float %res, float 0.0,
metadata !"oeq",
; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
- %ret = call float asm sideeffect "blah $1", "=f,{f0}"(float %val)
+ %ret = call float asm sideeffect "blah $1", "=f,{f0}"(float %val) #0
%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
float %val, float 0.0,
metadata !"olt",
br i1 %cmp, label %exit, label %store
store:
- call void asm sideeffect "blah", ""()
+ call void asm sideeffect "blah", ""() #0
br label %exit
exit:
; CHECK-NEXT: bhr %r14
; CHECK: br %r14
entry:
- %res = call float @llvm.fabs.f32(float %a)
+ %res = call float @llvm.fabs.f32(float %a) #0
%cmp = call i1 @llvm.experimental.constrained.fcmps.f32(
float %res, float 0.0,
metadata !"ogt",
; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
- %abs = call float @llvm.fabs.f32(float %a)
+ %abs = call float @llvm.fabs.f32(float %a) #0
%res = fneg float %abs
%cmp = call i1 @llvm.experimental.constrained.fcmps.f32(
float %res, float 0.0,
; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
- %ret = call float asm "blah $1", "=f,{f0}"(float %val)
+ %ret = call float asm "blah $1", "=f,{f0}"(float %val) #0
%cmp = call i1 @llvm.experimental.constrained.fcmps.f32(
float %val, float 0.0,
metadata !"olt",
br i1 %cmp, label %exit, label %store
store:
- call void asm sideeffect "blah", ""()
+ call void asm sideeffect "blah", ""() #0
br label %exit
exit:
declare double @llvm.experimental.constrained.fpext.f64.f32(float, metadata)
; Test cases where both elements of a v2f64 are converted to f32s.
-define void @f1(<2 x double> %val, <2 x float> *%ptr) {
+define void @f1(<2 x double> %val, <2 x float> *%ptr) #0 {
; CHECK-LABEL: f1:
; CHECK: vledb {{%v[0-9]+}}, %v24, 0, 0
; CHECK: br %r14
}
; Test cases where even elements of a v4f32 are converted to f64s.
-define <2 x double> @f3(<4 x float> %vec) {
+define <2 x double> @f3(<4 x float> %vec) #0 {
; CHECK-LABEL: f3:
; CHECK: vldeb %v24, {{%v[0-9]+}}
; CHECK: br %r14
}
; Test conversion of an f32 in a vector register to an f64.
-define double @f4(<4 x float> %vec) {
+define double @f4(<4 x float> %vec) #0 {
; CHECK-LABEL: f4:
; CHECK: wldeb %f0, %v24
; CHECK: br %r14