dt-bindings: nand: meson: fix meson nfc clock

EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted and the current binding was never
valid. the reasons for giving up are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link fot more information:
https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com
so The meson nfc can't work now, let us rework the clock.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220907080405.28240-2-liang.yang@amlogic.com

diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
index 5794ab1..5d5cdfe 100644 (file)
--- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
@@ -7,18 +7,19 @@ Required properties:
 - compatible : contains one of:
   - "amlogic,meson-gxl-nfc"
   - "amlogic,meson-axg-nfc"
+
+- reg        : Offset and length of the register set
+
+- reg-names  : "nfc" is the register set for NFC controller and "emmc"
+               is the register set for MCI controller.
+
 - clocks     :
        A list of phandle + clock-specifier pairs for the clocks listed
        in clock-names.
 
 - clock-names: Should contain the following:
        "core" - NFC module gate clock
-       "device" - device clock from eMMC sub clock controller
-       "rx" - rx clock phase
-       "tx" - tx clock phase
-
-- amlogic,mmc-syscon   : Required for NAND clocks, it's shared with SD/eMMC
-                               controller port C
+       "device" - parent clock for internal NFC
 
 Optional children nodes:
 Children nodes represent the available nand chips.
@@ -28,24 +29,18 @@ see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindi
 
 Example demonstrate on AXG SoC:
 
-       sd_emmc_c_clkc: mmc@7000 {
-               compatible = "amlogic,meson-axg-mmc-clkc", "syscon";
-               reg = <0x0 0x7000 0x0 0x800>;
-       };
-
        nand-controller@7800 {
                compatible = "amlogic,meson-axg-nfc";
-               reg = <0x0 0x7800 0x0 0x100>;
+               reg = <0x0 0x7800 0x0 0x100>,
+                     <0x0 0x7000 0x0 0x800>;
+               reg-names = "nfc", "emmc";
                #address-cells = <1>;
                #size-cells = <0>;
                interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
 
                clocks = <&clkc CLKID_SD_EMMC_C>,
-                       <&sd_emmc_c_clkc CLKID_MMC_DIV>,
-                       <&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>,
-                       <&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>;
-               clock-names = "core", "device", "rx", "tx";
-               amlogic,mmc-syscon = <&sd_emmc_c_clkc>;
+                        <&clkc CLKID_FCLK_DIV2>;
+               clock-names = "core", "device";
 
                pinctrl-names = "default";
                pinctrl-0 = <&nand_pins>;