arm64: dts: ls1028a: add missing SPI nodes

The LS1028A has three (dual) SPI controller. These are compatible with
the ones from the LS1021A. Add the nodes.

The third controller was tested on a custom board.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index da39068..8694098 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -290,6 +290,45 @@
                        status = "disabled";
                };
 
+               dspi0: spi@2100000 {
+                       compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x0 0x2100000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-names = "dspi";
+                       clocks = <&clockgen 4 1>;
+                       spi-num-chipselects = <4>;
+                       little-endian;
+                       status = "disabled";
+               };
+
+               dspi1: spi@2110000 {
+                       compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x0 0x2110000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-names = "dspi";
+                       clocks = <&clockgen 4 1>;
+                       spi-num-chipselects = <4>;
+                       little-endian;
+                       status = "disabled";
+               };
+
+               dspi2: spi@2120000 {
+                       compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x0 0x2120000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-names = "dspi";
+                       clocks = <&clockgen 4 1>;
+                       spi-num-chipselects = <3>;
+                       little-endian;
+                       status = "disabled";
+               };
+
                esdhc: mmc@2140000 {
                        compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
                        reg = <0x0 0x2140000 0x0 0x10000>;