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RISC-V: defconfigs: Remove redundant CONFIG_POWER_RESET
authorPalmer Dabbelt <palmer@rivosinc.com>
Fri, 19 Nov 2021 16:44:11 +0000 (08:44 -0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 6 Jan 2022 04:07:05 +0000 (20:07 -0800)
As of ab7fbad0c7d7 ("riscv: Fix unmet direct dependencies built based on
SOC_VIRT") we select CONFIG_POWER_RESET=y along with CONFIG_SOC_VIRT,
which is already in defconfig.  This make setting CONFIG_POWER_RESET in
the defconfigs redundant, so remove it to remain consistent with
savedefconfig.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/configs/defconfig
arch/riscv/configs/rv32_defconfig

index 45adb1f..0e2097d 100644 (file)
@@ -72,7 +72,6 @@ CONFIG_SPI_SIFIVE=y
 # CONFIG_PTP_1588_CLOCK is not set
 CONFIG_GPIOLIB=y
 CONFIG_GPIO_SIFIVE=y
-CONFIG_POWER_RESET=y
 CONFIG_DRM=m
 CONFIG_DRM_RADEON=m
 CONFIG_DRM_NOUVEAU=m
index 32cb91e..c783bc0 100644 (file)
@@ -68,7 +68,6 @@ CONFIG_HW_RANDOM_VIRTIO=y
 CONFIG_SPI=y
 CONFIG_SPI_SIFIVE=y
 # CONFIG_PTP_1588_CLOCK is not set
-CONFIG_POWER_RESET=y
 CONFIG_DRM=y
 CONFIG_DRM_RADEON=y
 CONFIG_DRM_VIRTIO_GPU=y