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drm/i915/cnl: Fix the CURSOR_COEFF_MASK used in DDI Vswing Programming
author
Navare, Manasi D
<manasi.d.navare@intel.com>
Fri, 30 Jun 2017 01:14:01 +0000
(18:14 -0700)
committer
Jani Nikula
<jani.nikula@intel.com>
Mon, 3 Jul 2017 13:12:57 +0000
(16:12 +0300)
The Cursor Coeff is lower 6 bits in the PORT_TX_DW4 register
and hence the CURSOR_COEFF_MASK should be (0x3F << 0)
Fixes:
04416108ccea
("drm/i915/cnl: Add registers related to voltage
swing sequences.")
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link:
http://patchwork.freedesktop.org/patch/msgid/1498785241-21138-1-git-send-email-manasi.d.navare@intel.com
(cherry picked from commit
fcace3b9b727e25ffa3f7ad2c96e76b8584a9f3e
)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/i915_reg.h
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diff --git
a/drivers/gpu/drm/i915/i915_reg.h
b/drivers/gpu/drm/i915/i915_reg.h
index
c8647cf
..
64cc674
100644
(file)
--- a/
drivers/gpu/drm/i915/i915_reg.h
+++ b/
drivers/gpu/drm/i915/i915_reg.h
@@
-1802,7
+1802,7
@@
enum skl_disp_power_wells {
#define POST_CURSOR_2(x) ((x) << 6)
#define POST_CURSOR_2_MASK (0x3F << 6)
#define CURSOR_COEFF(x) ((x) << 0)
-#define CURSOR_COEFF_MASK (0x3F <<
6
)
+#define CURSOR_COEFF_MASK (0x3F <<
0
)
#define _CNL_PORT_TX_DW5_GRP_AE 0x162354
#define _CNL_PORT_TX_DW5_GRP_B 0x1623D4