data_port_latch(DATA_SELECT_A15toA8, address >> 8);
}
-static void hk_cpu_write_6502(long address, long data, long wait_msec)
+static void hk_cpu_write_6502(long address, long length, const uint8_t *data)
{
- int c = BUS_CONTROL_BUS_STANDBY;
- //Á´¤Æ¤Î¥Ð¥¹¤ò»ß¤á¤ë
- data_port_latch(DATA_SELECT_CONTROL, c);
- // /rom ¤ò H ¤Ë¤·¤Æ¥Ð¥¹¤ò»ß¤á¤ë
- address_set(address | ADDRESS_MASK_A15);
-
- //¦Õ2 = L, R/W=L, address set, data set
- c = bit_clear(c, BITNUM_CPU_M2);
- data_port_set(c, data); //latch¤Ï¤³¤Î´Ø¿ôÆâÉô¤Ç¹Ô¤¦
- if(address & ADDRESS_MASK_A15){
- cpu_romcs_set(address & ADDRESS_MASK_A0toA14);
- }
- c = bit_clear(c, BITNUM_CPU_RW);
- data_port_latch(DATA_SELECT_CONTROL, c);
- wait(wait_msec);
- //¦Õ2 = H, data out
- c = bit_set(c, BITNUM_CPU_M2);
- c = bit_clear(c, BITNUM_WRITEDATA_OUTPUT);
- data_port_latch(DATA_SELECT_CONTROL, c);
- wait(wait_msec);
- //¦Õ2 = L, H ¤Ë¤¹¤ë¤Þ¤Ç R/W, address, Data ¤ò͸ú¾õÂ֤ˤ¹¤ë
- c = bit_clear(c, BITNUM_CPU_M2);
- data_port_latch(DATA_SELECT_CONTROL, c);
- wait(wait_msec);
- //¦Õ2 = H, R/W = H, address disable, data out disable
- if(address & ADDRESS_MASK_A15){
- //address & ADDRESS_MASK_A15 ¤ÇÆ°¤¤¤Æ¤¿..?
- cpu_romcs_set(address | ADDRESS_MASK_A15);
+ while(length != 0){
+ int c = BUS_CONTROL_BUS_STANDBY;
+ //Á´¤Æ¤Î¥Ð¥¹¤ò»ß¤á¤ë
+ data_port_latch(DATA_SELECT_CONTROL, c);
+ // /rom ¤ò H ¤Ë¤·¤Æ¥Ð¥¹¤ò»ß¤á¤ë
+ address_set(address | ADDRESS_MASK_A15);
+
+ //¦Õ2 = L, R/W=L, address set, data set
+ c = bit_clear(c, BITNUM_CPU_M2);
+ data_port_set(c, *data); //latch¤Ï¤³¤Î´Ø¿ôÆâÉô¤Ç¹Ô¤¦
+ if(address & ADDRESS_MASK_A15){
+ cpu_romcs_set(address & ADDRESS_MASK_A0toA14);
+ }
+ c = bit_clear(c, BITNUM_CPU_RW);
+ data_port_latch(DATA_SELECT_CONTROL, c);
+ //wait(wait_msec);
+ //¦Õ2 = H, data out
+ c = bit_set(c, BITNUM_CPU_M2);
+ c = bit_clear(c, BITNUM_WRITEDATA_OUTPUT);
+ data_port_latch(DATA_SELECT_CONTROL, c);
+ //wait(wait_msec);
+ //¦Õ2 = L, H ¤Ë¤¹¤ë¤Þ¤Ç R/W, address, Data ¤ò͸ú¾õÂ֤ˤ¹¤ë
+ c = bit_clear(c, BITNUM_CPU_M2);
+ data_port_latch(DATA_SELECT_CONTROL, c);
+ //wait(wait_msec);
+ //¦Õ2 = H, R/W = H, address disable, data out disable
+ if(address & ADDRESS_MASK_A15){
+ //address & ADDRESS_MASK_A15 ¤ÇÆ°¤¤¤Æ¤¿..?
+ cpu_romcs_set(address | ADDRESS_MASK_A15);
+ }
+ data_port_latch(DATA_SELECT_CONTROL, BUS_CONTROL_BUS_STANDBY);
+ address += 1;
+ data += 1;
+ length -= 1;
}
- data_port_latch(DATA_SELECT_CONTROL, BUS_CONTROL_BUS_STANDBY);
}
//onajimi ¤À¤È /CS ¤È /OE ¤¬Æ±¤¸¤Ë¤Ê¤Ã¤Æ¤¤¤ë¤¬¡¢hongkong¤À¤È»ß¤á¤é¤ì¤ë¡£½ñ¤¹þ¤ß»þ¤Ë output enable ¤Ï H ¤Ç¤¢¤ë¤Ù¤¡£
-static void hk_ppu_write(long address, long data)
+static void hk_ppu_write(long address, long length, const uint8_t *data)
{
- int c = BUS_CONTROL_BUS_STANDBY;
- c = bit_clear(c, BITNUM_CPU_M2); //¤¿¤Ö¤ó¤¤¤ë
- //c = bit_clear(c, BITNUM_CPU_RW);
- data_port_latch(DATA_SELECT_CONTROL, c);
- //cpu rom ¤ò»ß¤á¤¿¥¢¥É¥ì¥¹¤òÅϤ¹
- address_set((address & ADDRESS_MASK_A0toA12) | ADDRESS_MASK_A15);
- data_port_set(c, data);
-// data_port_latch(DATA_SELECT_CONTROL, c);
- //CS down
- c = bit_clear(c, BITNUM_PPU_SELECT);
- data_port_latch(DATA_SELECT_CONTROL, c);
- //WE down
- c = bit_clear(c, BITNUM_WRITEDATA_OUTPUT);
- c = bit_clear(c, BITNUM_PPU_RW);
- data_port_latch(DATA_SELECT_CONTROL, c);
- //WE up
- c = bit_set(c, BITNUM_PPU_RW);
- data_port_latch(DATA_SELECT_CONTROL, c);
- //CS up
-// c = bit_set(c, BITNUM_WRITEDATA_OUTPUT);
- data_port_latch(DATA_SELECT_CONTROL, BUS_CONTROL_BUS_STANDBY);
+ while(address != 0){
+ int c = BUS_CONTROL_BUS_STANDBY;
+ c = bit_clear(c, BITNUM_CPU_M2); //¤¿¤Ö¤ó¤¤¤ë
+ //c = bit_clear(c, BITNUM_CPU_RW);
+ data_port_latch(DATA_SELECT_CONTROL, c);
+ //cpu rom ¤ò»ß¤á¤¿¥¢¥É¥ì¥¹¤òÅϤ¹
+ address_set((address & ADDRESS_MASK_A0toA12) | ADDRESS_MASK_A15);
+ data_port_set(c, *data);
+ // data_port_latch(DATA_SELECT_CONTROL, c);
+ //CS down
+ c = bit_clear(c, BITNUM_PPU_SELECT);
+ data_port_latch(DATA_SELECT_CONTROL, c);
+ //WE down
+ c = bit_clear(c, BITNUM_WRITEDATA_OUTPUT);
+ c = bit_clear(c, BITNUM_PPU_RW);
+ data_port_latch(DATA_SELECT_CONTROL, c);
+ //WE up
+ c = bit_set(c, BITNUM_PPU_RW);
+ data_port_latch(DATA_SELECT_CONTROL, c);
+ //CS up
+ // c = bit_set(c, BITNUM_WRITEDATA_OUTPUT);
+ data_port_latch(DATA_SELECT_CONTROL, BUS_CONTROL_BUS_STANDBY);
+
+ address += 1;
+ data += 1;
+ length -= 1;
+ }
}
#if 0
TIMEOUT = 4000
};
//-------- read sequence --------
-static void device_read(usb_dev_handle *handle, enum request r, long address, long length, u8 *data)
+static void device_read(usb_dev_handle *handle, enum request r, long address, long length, uint8_t *data)
{
int cnt = usb_control_msg(
handle,
);
assert(cnt == length);
}
-static void read_main(const enum request r, long address, long length, u8 *data)
+static void read_main(const enum request r, long address, long length, uint8_t *data)
{
while(length >= READ_PACKET_SIZE){
device_read(handle, r, address, READ_PACKET_SIZE, data);
device_read(handle, r, address, length, data);
}
}
-static void kazzo_cpu_read(long address, long length, u8 *data)
+static void kazzo_cpu_read(long address, long length, uint8_t *data)
{
read_main(REQUEST_CPU_READ, address, length, data);
}
-static void kazzo_ppu_read(long address, long length, u8 *data)
+static void kazzo_ppu_read(long address, long length, uint8_t *data)
{
read_main(REQUEST_PPU_READ, address, length, data);
}
//-------- write sequence --------
-static void device_write(usb_dev_handle *handle, enum request w, long address, long length, u8 *data)
+static void device_write(usb_dev_handle *handle, enum request w, long address, long length, const uint8_t *data)
{
+ //const ¤ò³°¤·¤Æ̵ÍýÌðÍýÅϤ¹¤·¤«¤Ê¤¤
int cnt = usb_control_msg(
handle,
USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_ENDPOINT_OUT,
w, address,
- 0, data, length, TIMEOUT
+ 0, (uint8_t *) data, length, TIMEOUT
);
assert(cnt == length);
}
-static void kazzo_cpu_write_6502(long address, long data, long wait_msec)
+static void kazzo_cpu_write_6502(long address, long length, const uint8_t *data)
{
- u8 d = (u8) (data & 0xff);
- device_write(handle, REQUEST_CPU_WRITE_6502, address, 1, &d);
+ device_write(handle, REQUEST_CPU_WRITE_6502, address, length, data);
}
static void kazzo_cpu_write_flash(long address, long data)
{
- u8 d = (u8) (data & 0xff);
+ uint8_t d = (uint8_t) (data & 0xff);
device_write(handle, REQUEST_CPU_WRITE_FLASH, address, 1, &d);
}
-static void kazzo_ppu_write(long address, long data)
+static void kazzo_ppu_write(long address, long length, const uint8_t *data)
{
- u8 d = (u8) (data & 0xff);
- device_write(handle, REQUEST_PPU_WRITE, address, 1, &d);
+ device_write(handle, REQUEST_PPU_WRITE, address, length, data);
}
-static inline void pack_short_le(long l, u8 *t)
+static inline void pack_short_le(long l, uint8_t *t)
{
t[0] = l & 0xff;
t[1] = (l >> 8) & 0xff;
static flash_config(enum request r, long c2aaa, long c5555, long unit)
{
const int size = 2 * 3;
- u8 t[size];
+ uint8_t t[size];
assert(unit >= 1 && unit < 0x400);
pack_short_le(c2aaa, t);
pack_short_le(c5555, t + 2);
flash_config(REQUEST_PPU_FLASH_CONFIG_SET, c2aaa, c5555, unit);
}
-static inline void flash_execute(enum request p, enum request s, long address, u8 *data, int size)
+static inline void flash_execute(enum request p, enum request s, long address, uint8_t *data, int size)
{
- u8 status;
+ uint8_t status;
device_write(handle, p, address, size, data);
do{
wait(1);
flash_execute(REQUEST_PPU_FLASH_ERASE, REQUEST_PPU_FLASH_STATUS, address, NULL, 0);
}
-static void flash_program(enum request p, enum request s, long address, long length, u8 *data)
+static void flash_program(enum request p, enum request s, long address, long length, uint8_t *data)
{
while(length >= READ_PACKET_SIZE){
flash_execute(p, s, address, data, READ_PACKET_SIZE);
length -= READ_PACKET_SIZE;
}
}
-static void kazzo_cpu_flash_program(long address, long length, u8 *data)
+static void kazzo_cpu_flash_program(long address, long length, uint8_t *data)
{
enum request p = REQUEST_CPU_FLASH_PROGRAM;
enum request s = REQUEST_CPU_FLASH_STATUS;
flash_program(p, s, address, length, data);
}
-static void kazzo_ppu_flash_program(long address, long length, u8 *data)
+static void kazzo_ppu_flash_program(long address, long length, uint8_t *data)
{
flash_program(REQUEST_PPU_FLASH_PROGRAM, REQUEST_PPU_FLASH_STATUS, address, length, data);
}
const char *name;
int (*open_or_close)(enum reader_control oc);
void (*init)(void);
- void (*cpu_read)(long address, long length, u8 *data);
- void (*cpu_write_6502)(long address, long data, long wait_msec);
- void (*ppu_read)(long address, long length, u8 *data);
- void (*ppu_write)(long address, long data);
+ void (*cpu_read)(long address, long length, uint8_t *data);
+ void (*cpu_write_6502)(long address, long length, const uint8_t *data);
+ void (*ppu_read)(long address, long length, uint8_t *data);
+ void (*ppu_write)(long address, long length, const uint8_t *data);
int flash_support;
void (*cpu_flash_config)(long c2aaa, long c5555, long unit);
void (*cpu_flash_erase)(long address);
- void (*cpu_flash_program)(long address, long length, u8 *data);
+ void (*cpu_flash_program)(long address, long length, uint8_t *data);
void (*ppu_flash_config)(long c2aaa, long c5555, long unit);
void (*ppu_flash_erase)(long address);
- void (*ppu_flash_program)(long address, long length, u8 *data);
+ void (*ppu_flash_program)(long address, long length, uint8_t *data);
};
int paralellport_open_or_close(enum reader_control oc);
const struct reader_driver *reader_driver_get(const char *name);
H:1, L:0, x:ROMareaaccess»þ0, ¤½¤ì°Ê³°1
*/
-static void cpu_write_6502(long address, long data, long wait_msec)
+static void cpu_write_6502(long address, long length, const uint8_t *data)
{
- int control = BUS_CONTROL_BUS_WRITE;
- //addressÀßÄê + Á´¤Æ¤Î¥Ð¥¹¤ò»ß¤á¤ë
- address_set(address, control);
+ while(length != 0){
+ int control = BUS_CONTROL_BUS_WRITE;
+ //addressÀßÄê + Á´¤Æ¤Î¥Ð¥¹¤ò»ß¤á¤ë
+ address_set(address, control);
- //¦Õ2 = L, R/W=L, data set, dataout
- control = bit_clear(control, BITNUM_CPU_M2);
- data_set(control, data);
- control = bit_clear(control, BITNUM_CPU_RW);
- bus_control(control);
- if(address & ADDRESS_MASK_A15){
- control = bit_clear(control, BITNUM_CPU_RAMROM_SELECT);
+ //¦Õ2 = L, R/W=L, data set, dataout
+ control = bit_clear(control, BITNUM_CPU_M2);
+ data_set(control, *data);
+ control = bit_clear(control, BITNUM_CPU_RW);
+ bus_control(control);
+ if(address & ADDRESS_MASK_A15){
+ control = bit_clear(control, BITNUM_CPU_RAMROM_SELECT);
+ }
+ //wait(wait_msec);
+
+ //¦Õ2 = H, data out
+ control = bit_set(control, BITNUM_CPU_M2);
+ bus_control(control);
+ //wait(wait_msec);
+ //¦Õ2 = L, H ¤Ë¤¹¤ë¤Þ¤Ç R/W, address, Data ¤ò͸ú¾õÂ֤ˤ¹¤ë
+ control = bit_clear(control, BITNUM_CPU_M2);
+ bus_control(control);
+ //wait(wait_msec);
+ //¦Õ2 = H, R/W = H, address disable, data out disable
+ bus_control(BUS_CONTROL_BUS_WRITE);
+
+ address += 1;
+ data += 1;
+ length--;
}
- wait(wait_msec);
-
- //¦Õ2 = H, data out
- control = bit_set(control, BITNUM_CPU_M2);
- bus_control(control);
- wait(wait_msec);
- //¦Õ2 = L, H ¤Ë¤¹¤ë¤Þ¤Ç R/W, address, Data ¤ò͸ú¾õÂ֤ˤ¹¤ë
- control = bit_clear(control, BITNUM_CPU_M2);
- bus_control(control);
- wait(wait_msec);
- //¦Õ2 = H, R/W = H, address disable, data out disable
- bus_control(BUS_CONTROL_BUS_WRITE);
}
-static void ppu_write(long address, long data)
+static void ppu_write(long address, long length, const uint8_t *data)
{
- int control = BUS_CONTROL_BUS_WRITE;
+ while(length != 0){
+ int control = BUS_CONTROL_BUS_WRITE;
- address_set(address, control);
- bus_control(control);
- data_set(control, data);
- control = bit_clear(control, BITNUM_PPU_RW);
- control = bit_clear(control, BITNUM_PPU_SELECT);
- bus_control(control);
- bus_control(BUS_CONTROL_BUS_WRITE);
+ address_set(address, control);
+ bus_control(control);
+ data_set(control, *data);
+ control = bit_clear(control, BITNUM_PPU_RW);
+ control = bit_clear(control, BITNUM_PPU_SELECT);
+ bus_control(control);
+ bus_control(BUS_CONTROL_BUS_WRITE);
+
+ address += 1;
+ data += 1;
+ length -= 1;
+ }
}
/*
int ret = OK;
const int testsize = 0x80;
int testcount = 3;
- u8 *master, *reload;
+ uint8_t *master, *reload;
master = malloc(testsize);
reload = malloc(testsize);
}
enum {PPU_TEST_RAM, PPU_TEST_ROM};
-const u8 PPU_TEST_DATA[] = "PPU_TEST_DATA";
+const uint8_t PPU_TEST_DATA[] = "PPU_TEST_DATA";
static int ppu_ramfind(const struct reader_driver *d)
{
- const int length = sizeof(PPU_TEST_DATA);
+ const long length = sizeof(PPU_TEST_DATA);
const long testaddr = 123;
+ uint8_t writedata[length];
//ppu ram data fill 0
- {
- int i = length;
- long address = testaddr;
- while(i != 0){
- d->ppu_write(address++, 0);
- i--;
- }
- }
+ memset(writedata, 0, length);
+ d->ppu_write(testaddr, length, writedata);
//ppu test data write
- {
- const u8 *data;
- int i = length;
- long address = testaddr;
- data = PPU_TEST_DATA;
- while(i != 0){
- d->ppu_write(address++, (long) *data);
- data++;
- i--;
- }
- }
+ d->ppu_write(testaddr, length, PPU_TEST_DATA);
- u8 writedata[length];
d->ppu_read(testaddr, length, writedata);
if(memcmp(writedata, PPU_TEST_DATA, length) == 0){
return PPU_TEST_RAM;
return PPU_TEST_ROM;
}
-static int ramtest(const int region, const struct reader_driver *d, long address, long length, u8 *writedata, u8 *testdata, const long filldata)
+static int ramtest(const int region, const struct reader_driver *d, long address, long length, uint8_t *writedata, uint8_t *testdata, const long filldata)
{
- long i = length;
- long a = address;
- while(i != 0){
- switch(region){
- case MEMORY_AREA_CPU_RAM:
- d->cpu_write_6502(a, filldata, 0);
- break;
- case MEMORY_AREA_PPU:
- d->ppu_write(a, filldata);
- break;
- default:
- assert(0);
- }
- a++;
- i--;
+ memset(writedata, filldata, length);
+ switch(region){
+ case MEMORY_AREA_CPU_RAM:
+ d->cpu_write_6502(address, length, writedata);
+ break;
+ case MEMORY_AREA_PPU:
+ d->ppu_write(address, length, writedata);
+ break;
+ default:
+ assert(0);
}
switch(region){
case MEMORY_AREA_CPU_RAM:
default:
assert(0);
}
- memset(writedata, filldata, length);
if(memcmp(writedata, testdata, length) == 0){
return 0;
}
static const long SRAMTESTDATA[] = {0xff, 0xaa, 0x55, 0x00};
static int sramtest(const int region, const struct reader_driver *d, long address, long length)
{
- u8 *writedata, *testdata;
+ uint8_t *writedata, *testdata;
int error = 0;
int i;
testdata = malloc(length);
}
printf("%s ROM 0x%05x:", m->name, m->offset);
int offset = 0;
- const u8 *data;
+ const uint8_t *data;
data = m->data;
while(length != 0){
char safix;
}
}
-static void checksum_print(const u8 *data, long length)
+static void checksum_print(const uint8_t *data, long length)
{
int sum = 0;
while(length != 0){
static const char EXECUTE_ERROR_PREFIX[] = "execute error:";
static const char EXECUTE_PROGRAM_PREPARE[] = "%s device initialize ... ";
static const char EXECUTE_PROGRAM_DONE[] = "done\n";
-static void execute_cpu_ramrw(const struct reader_driver *d, const struct memory *ram, int mode, long address, long length, long wait)
+static void execute_cpu_ramrw(const struct reader_driver *d, const struct memory *ram, int mode, long address, long length)
{
if(mode == MODE_RAM_WRITE){
- const u8 *writedata;
+ d->cpu_write_6502(address, length, ram->data);
+/* const uint8_t *writedata;
long a = address;
long l = length;
writedata = ram->data;
d->cpu_write_6502(a++, *writedata, wait);
writedata += 1;
l--;
- }
- u8 *compare;
+ }*/
+ uint8_t *compare;
compare = malloc(length);
d->cpu_read(address, length, compare);
if(memcmp(ram->data, compare, length) == 0){
d->open_or_close(READER_CLOSE);
return NG;
}
- u8 *program_compare;
+ uint8_t *program_compare;
program_compare = NULL;
if(c->mode == MODE_ROM_PROGRAM){
printf("flashmemory/SRAM program mode. To abort programming, press Ctrl+C\n");
}break;
case SCRIPT_OPCODE_CPU_WRITE:{
long data;
+ uint8_t d8;
expression_calc(&s->expression, &data);
- d->cpu_write_6502(s->value[0], data, c->write_wait);
+ d8 = data & 0xff;
+ d->cpu_write_6502(s->value[0], 1, &d8);
}
break;
case SCRIPT_OPCODE_CPU_RAMRW:{
break;
}
}
- execute_cpu_ramrw(d, &cpu_ram, c->mode, address, length, c->write_wait);
+ execute_cpu_ramrw(d, &cpu_ram, c->mode, address, length);
read_result_print(&cpu_ram, length);
cpu_ram.data += length;
cpu_ram.offset += length;
if(length == 0){
/*for mmc2,4 protect.
¤³¤Î¤È¤¤Ï1byteÆɤ߹þ¤ó¤Ç¡¢¤½¤ÎÆâÍƤϥХåե¡¤Ë¤¤¤ì¤Ê¤¤*/
- u8 dummy;
+ uint8_t dummy;
d->ppu_read(address, 1, &dummy);
}else{
d->ppu_read(address, length, ppu_rom.data);
case SCRIPT_OPCODE_PPU_WRITE:
if(DEBUG == 1){
long data;
+ uint8_t d8;
expression_calc(&s->expression, &data);
- d->ppu_write(s->value[0], data);
+ d8 = data;
+ d->ppu_write(s->value[0], 1, &d8);
}
break;
case SCRIPT_OPCODE_PPU_PROGRAM:{
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