iommu/arm-smmu: allow 42-bit stage-1 output size with 64K pages

The output size of stage-1 is currently limited by the input size of
stage-2, which is further limited by VA_BITS since we make use of the
standard pgd_alloc functions for creating page tables.

This patch ensures that we use VA_BITS instead of a hardcoded '39'
for the stage-1 output size limit.

Signed-off-by: Will Deacon <will.deacon@arm.com>

diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 647c3c7..afcb0e3 100644 (file)
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1804,7 +1804,7 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)
         * allocation (PTRS_PER_PGD).
         */
 #ifdef CONFIG_64BIT
-       smmu->s1_output_size = min(39UL, size);
+       smmu->s1_output_size = min((unsigned long)VA_BITS, size);
 #else
        smmu->s1_output_size = min(32UL, size);
 #endif