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memory: tegra: Set DMA mask based on supported address bits
authorThierry Reding <treding@nvidia.com>
Fri, 15 Feb 2019 15:28:19 +0000 (16:28 +0100)
committerThierry Reding <treding@nvidia.com>
Mon, 11 Nov 2019 13:55:24 +0000 (14:55 +0100)
The memory controller on Tegra124 and later supports 34 or more address
bits. Advertise that by setting the DMA mask based on the number of the
address bits.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/memory/tegra/mc.c

index 3d8d322..322aa7e 100644 (file)
@@ -5,6 +5,7 @@
 
 #include <linux/clk.h>
 #include <linux/delay.h>
+#include <linux/dma-mapping.h>
 #include <linux/interrupt.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
@@ -626,6 +627,7 @@ static int tegra_mc_probe(struct platform_device *pdev)
        struct resource *res;
        struct tegra_mc *mc;
        void *isr;
+       u64 mask;
        int err;
 
        mc = devm_kzalloc(&pdev->dev, sizeof(*mc), GFP_KERNEL);
@@ -637,6 +639,14 @@ static int tegra_mc_probe(struct platform_device *pdev)
        mc->soc = of_device_get_match_data(&pdev->dev);
        mc->dev = &pdev->dev;
 
+       mask = DMA_BIT_MASK(mc->soc->num_address_bits);
+
+       err = dma_coerce_mask_and_coherent(&pdev->dev, mask);
+       if (err < 0) {
+               dev_err(&pdev->dev, "failed to set DMA mask: %d\n", err);
+               return err;
+       }
+
        /* length of MC tick in nanoseconds */
        mc->tick = 30;