OSDN Git Service

[IA64] Fix registered interrupt check
authorKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Mon, 30 Jul 2007 02:54:41 +0000 (11:54 +0900)
committerTony Luck <tony.luck@intel.com>
Mon, 30 Jul 2007 23:29:47 +0000 (16:29 -0700)
Fix the problem that interrupts are not initialized correctly at PCI
hotplug or driver reloading time.

By vector domain change, the iosapic_rte_info structure was changed to
be on the iosapic_intr_info[irq].rtes list even after the interrupts
are unregistered. So iosapic_intr_info[irq].rtes list must not be
checked to see if there are registered interrupts (RTEs) on the
irq. We must check iosapic_intr_info[irq].count counter instead.

Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
arch/ia64/kernel/iosapic.c

index f4bd285..5f6d98e 100644 (file)
@@ -142,7 +142,7 @@ struct iosapic_rte_info {
 static struct iosapic_intr_info {
        struct list_head rtes;          /* RTEs using this vector (empty =>
                                         * not an IOSAPIC interrupt) */
-       int             count;          /* # of RTEs that shares this vector */
+       int             count;          /* # of registered RTEs */
        u32             low32;          /* current value of low word of
                                         * Redirection table entry */
        unsigned int    dest;           /* destination CPU physical ID */
@@ -313,7 +313,7 @@ mask_irq (unsigned int irq)
        int rte_index;
        struct iosapic_rte_info *rte;
 
-       if (list_empty(&iosapic_intr_info[irq].rtes))
+       if (!iosapic_intr_info[irq].count)
                return;                 /* not an IOSAPIC interrupt! */
 
        /* set only the mask bit */
@@ -331,7 +331,7 @@ unmask_irq (unsigned int irq)
        int rte_index;
        struct iosapic_rte_info *rte;
 
-       if (list_empty(&iosapic_intr_info[irq].rtes))
+       if (!iosapic_intr_info[irq].count)
                return;                 /* not an IOSAPIC interrupt! */
 
        low32 = iosapic_intr_info[irq].low32 &= ~IOSAPIC_MASK;
@@ -363,7 +363,7 @@ iosapic_set_affinity (unsigned int irq, cpumask_t mask)
 
        dest = cpu_physical_id(first_cpu(mask));
 
-       if (list_empty(&iosapic_intr_info[irq].rtes))
+       if (!iosapic_intr_info[irq].count)
                return;                 /* not an IOSAPIC interrupt */
 
        set_irq_affinity_info(irq, dest, redir);
@@ -542,7 +542,7 @@ iosapic_reassign_vector (int irq)
 {
        int new_irq;
 
-       if (!list_empty(&iosapic_intr_info[irq].rtes)) {
+       if (iosapic_intr_info[irq].count) {
                new_irq = create_irq();
                if (new_irq < 0)
                        panic("%s: out of interrupt vectors!\n", __FUNCTION__);
@@ -677,7 +677,7 @@ get_target_cpu (unsigned int gsi, int irq)
         * In case of vector shared by multiple RTEs, all RTEs that
         * share the vector need to use the same destination CPU.
         */
-       if (!list_empty(&iosapic_intr_info[irq].rtes))
+       if (iosapic_intr_info[irq].count)
                return iosapic_intr_info[irq].dest;
 
        /*