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dt-bindings: mediatek: update bindings for MT7629 SoC
authorRyder Lee <ryder.lee@mediatek.com>
Sun, 17 Feb 2019 13:50:30 +0000 (21:50 +0800)
committerMatthias Brugger <matthias.bgg@gmail.com>
Mon, 15 Apr 2019 17:29:28 +0000 (19:29 +0200)
This updates bindings for MT7629 SoC, which includes very basic items
such as system timer, UART, sysirq and scpsys unit.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt
Documentation/devicetree/bindings/serial/mtk-uart.txt
Documentation/devicetree/bindings/soc/mediatek/scpsys.txt

index ade059d..9ef0894 100644 (file)
@@ -1,6 +1,6 @@
-+Mediatek MT65xx/MT67xx/MT81xx sysirq
+MediaTek sysirq
 
-Mediatek SOCs sysirq support controllable irq inverter for each GIC SPI
+MediaTek SOCs sysirq support controllable irq inverter for each GIC SPI
 interrupt.
 
 Required properties:
@@ -11,6 +11,7 @@ Required properties:
        "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127
        "mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq": for MT7622
        "mediatek,mt7623-sysirq", "mediatek,mt6577-sysirq": for MT7623
+       "mediatek,mt7629-sysirq", "mediatek,mt6577-sysirq": for MT7629
        "mediatek,mt6795-sysirq", "mediatek,mt6577-sysirq": for MT6795
        "mediatek,mt6797-sysirq", "mediatek,mt6577-sysirq": for MT6797
        "mediatek,mt6765-sysirq", "mediatek,mt6577-sysirq": for MT6765
index 742cb47..4910f63 100644 (file)
@@ -1,4 +1,4 @@
-* Mediatek Universal Asynchronous Receiver/Transmitter (UART)
+* MediaTek Universal Asynchronous Receiver/Transmitter (UART)
 
 Required properties:
 - compatible should contain:
@@ -13,6 +13,7 @@ Required properties:
   * "mediatek,mt6797-uart" for MT6797 compatible UARTS
   * "mediatek,mt7622-uart" for MT7622 compatible UARTS
   * "mediatek,mt7623-uart" for MT7623 compatible UARTS
+  * "mediatek,mt7629-uart" for MT7629 compatible UARTS
   * "mediatek,mt8127-uart" for MT8127 compatible UARTS
   * "mediatek,mt8135-uart" for MT8135 compatible UARTS
   * "mediatek,mt8173-uart" for MT8173 compatible UARTS
index d6fe16f..9a88d41 100644 (file)
@@ -23,6 +23,7 @@ Required properties:
        - "mediatek,mt7622-scpsys"
        - "mediatek,mt7623-scpsys", "mediatek,mt2701-scpsys": For MT7623 SoC
        - "mediatek,mt7623a-scpsys": For MT7623A SoC
+       - "mediatek,mt7629-scpsys", "mediatek,mt7622-scpsys": For MT7629 SoC
        - "mediatek,mt8173-scpsys"
 - #power-domain-cells: Must be 1
 - reg: Address range of the SCPSYS unit
@@ -33,7 +34,7 @@ Required properties:
        Required clocks for MT2701 or MT7623: "mm", "mfg", "ethif"
        Required clocks for MT2712: "mm", "mfg", "venc", "jpgdec", "audio", "vdec"
        Required clocks for MT6797: "mm", "mfg", "vdec"
-       Required clocks for MT7622: "hif_sel"
+       Required clocks for MT7622 or MT7629: "hif_sel"
        Required clocks for MT7622A: "ethif"
        Required clocks for MT8173: "mm", "mfg", "venc", "venc_lt"