OSDN Git Service

drivers: mfd: wcd9xxx: Add support to configure dmic clock
authorSudheer Papothi <spapothi@codeaurora.org>
Thu, 19 May 2016 14:59:13 +0000 (20:29 +0530)
committerGerrit - the friendly Code Review server <code-review@localhost>
Thu, 4 Aug 2016 18:05:31 +0000 (11:05 -0700)
DMIC clock on ECPP(Echo Cancellation Ping-Pong) path can be set to
lower clock rate to avoid power consumption. Change configures the
DMIC clock rate on ECPP path based on device tree settings.

CRs-fixed: 1022917
Change-Id: I03e1a7f5ef3cf1b1907c03a3d38965ce3a611bc4
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
Documentation/devicetree/bindings/sound/wcd_codec.txt
drivers/mfd/wcd9xxx-utils.c
include/linux/mfd/wcd9xxx/pdata.h

index d585595..e37e7c2 100644 (file)
@@ -92,6 +92,14 @@ Optional properties:
                           involving DMIC will use the rate defined by
                           cdc-dmic-sample-rate.
 
+ - qcom,cdc-ecpp-dmic-rate: Specifies the sample rate of digital mic in HZ to be
+                           used by ECPP (Echo Cancellation Ping Pong) block
+                           on the codec. The valid set of values are same
+                           as that of cdc-dmic-sample-rate, but this rate will
+                           only be used by ECPP and all other audio use cases
+                           involving DMIC will use the rate defined by
+                           cdc-dmic-sample-rate.
+
  - qcom,cdc-dmic-clk-drv-strength: Specifies the drive strength for digital microphone
                                   clock in the codec. Accepted values are 2,4,8 and 16.
                                   The clock drive strentgh is in uA. Codec driver will
index 22d61d9..3828683 100644 (file)
@@ -298,6 +298,7 @@ struct wcd9xxx_pdata *wcd9xxx_populate_dt_data(struct device *dev)
        struct wcd9xxx_pdata *pdata;
        u32 dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
        u32 mad_dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
+       u32 ecpp_dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
        u32 dmic_clk_drive = WCD9XXX_DMIC_CLK_DRIVE_UNDEFINED;
        u32 prop_val;
 
@@ -358,6 +359,15 @@ struct wcd9xxx_pdata *wcd9xxx_populate_dt_data(struct device *dev)
                                                        pdata->mclk_rate,
                                                        "mad_dmic_rate");
 
+       if (!(wcd9xxx_read_of_property_u32(dev, "qcom,cdc-ecpp-dmic-rate",
+                                          &prop_val)))
+               ecpp_dmic_sample_rate = prop_val;
+
+       pdata->ecpp_dmic_sample_rate = wcd9xxx_validate_dmic_sample_rate(dev,
+                                                       ecpp_dmic_sample_rate,
+                                                       pdata->mclk_rate,
+                                                       "ecpp_dmic_rate");
+
        if (!(of_property_read_u32(dev->of_node,
                                   "qcom,cdc-dmic-clk-drv-strength",
                                   &prop_val)))
index 52277f2..7bf2bff 100755 (executable)
@@ -189,6 +189,7 @@ struct wcd9xxx_pdata {
        u32 mclk_rate;
        u32 dmic_sample_rate;
        u32 mad_dmic_sample_rate;
+       u32 ecpp_dmic_sample_rate;
        u32 dmic_clk_drv;
        u16 use_pinctrl;
 };